Igor Breger 31205fdf6a AVX512:Implemented encoding for the vmovq.s instruction. ... Differential Revision: http://reviews.llvm.org/D14810 llvm-svn: 254248		2015-11-29 07:41:26 +00:00
..
AArch64	[AArch64] Add ARMv8.2-A FP16 scalar instructions	2015-11-27 13:04:48 +00:00
AMDGPU	AMDGPU/SI: Emit HSA kernels with symbol type STT_AMDGPU_HSA_KERNEL	2015-11-06 11:45:14 +00:00
ARM	Revert "[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM."	2015-11-28 17:23:46 +00:00
AsmParser	[MC] Use LShr for constant evaluation of ">>" on non-arm64 darwin.	2015-11-11 00:51:36 +00:00
COFF	MC: Simplify handling of temporary symbols in COFF writer.	2015-11-26 23:29:27 +00:00
Disassembler	[AArch64] Add ARMv8.2-A FP16 scalar instructions	2015-11-27 13:04:48 +00:00
ELF	[Assembler] Make fatal assembler errors non-fatal	2015-11-17 10:00:43 +00:00
Hexagon	[Hexagon] NFC. Adding a number of packet correctness tests.	2015-11-13 01:46:06 +00:00
MachO	[Assembler] Make fatal assembler errors non-fatal	2015-11-17 10:00:43 +00:00
Markup
Mips	[mips][ias] Range check uimm5 operands and fix several bugs this revealed.	2015-11-26 16:35:41 +00:00
PowerPC	Relax a few more overspecified tests.	2015-11-03 19:38:19 +00:00
Sparc	Update test to take into account for r251271.	2015-10-26 03:34:29 +00:00
SystemZ	[SystemZ] testcase MC/SystemZ/insn-good-z13.s extended.	2015-10-12 10:13:57 +00:00
X86	AVX512:Implemented encoding for the vmovq.s instruction.	2015-11-29 07:41:26 +00:00