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llvm-mirror/unittests/CodeGen
Diana Picus 7511d6e3fd [ARM GlobalISel] Support G_CTLZ and G_CTLZ_ZERO_UNDEF
We can now select CLZ via the TableGen'erated code, so support G_CTLZ
and G_CTLZ_ZERO_UNDEF throughout the pipeline for types <= s32.

Legalizer:
If the CLZ instruction is available, use it for both G_CTLZ and
G_CTLZ_ZERO_UNDEF. Otherwise, use a libcall for G_CTLZ_ZERO_UNDEF and
lower G_CTLZ in terms of it.

In order to achieve this we need to add support to the LegalizerHelper
for the legalization of G_CTLZ_ZERO_UNDEF for s32 as a libcall (__clzsi2).

We also need to allow lowering of G_CTLZ in terms of G_CTLZ_ZERO_UNDEF
if that is supported as a libcall, as opposed to just if it is Legal or
Custom. Due to a minor refactoring of the helper function in charge of
this, we will also allow the same behaviour for G_CTTZ and G_CTPOP.
This is not going to be a problem in practice since we don't yet have
support for treating G_CTTZ and G_CTPOP as libcalls (not even in
DAGISel).

Reg bank select:
Map G_CTLZ to GPR. G_CTLZ_ZERO_UNDEF should not make it to this point.

Instruction select:
Nothing to do.

llvm-svn: 347545
2018-11-26 11:07:02 +00:00
..
GlobalISel [ARM GlobalISel] Support G_CTLZ and G_CTLZ_ZERO_UNDEF 2018-11-26 11:07:02 +00:00
AArch64SelectionDAGTest.cpp [SelectionDAG] Assert on the width of DemandedElts argument to computeKnownBits for all vector typed operations not just build_vector. 2018-11-08 20:29:17 +00:00
CMakeLists.txt [Codegen] Fix test added in rL341380: AArch64SelectionDAGTest needs to link against Analysis lib. 2018-09-04 20:19:17 +00:00
DIEHashTest.cpp [DebugInfo] Reduce debug_str_offsets section size 2018-08-07 09:54:52 +00:00
LowLevelTypeTest.cpp [GlobalISel] Enable legalizing non-power-of-2 sized types. 2017-11-07 10:34:34 +00:00
MachineInstrBundleIteratorTest.cpp Re-sort #include lines for unittests. This uses a slightly modified 2017-06-06 11:06:56 +00:00
MachineInstrTest.cpp [DebugInfo] DISubprogram flags get their own flags word. NFC. 2018-11-19 18:29:28 +00:00
MachineOperandTest.cpp Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
ScalableVectorMVTsTest.cpp [IR][CodeGen] Remove dependency on EVT from IR/Function.cpp. Move EVT to CodeGen layer. 2018-03-29 17:21:10 +00:00