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llvm-mirror/test/MC/Disassembler/X86
Vedant Kumar 89ece8e139 [llvm-mc] Ignore opcode size prefix in 64-bit CALL disassembly
This is a fix for disassembling unusual instruction sequences in 64-bit
mode w.r.t the CALL rel16 instruction. It might be desirable to move the
check somewhere else, but it essentially mimics the special case
handling with JCXZ in 16-bit mode.

The current behavior accepts the opcode size prefix and causes the
call's immediate to stop disassembling after 2 bytes. When debugging
sequences of instructions with this pattern, the disassembler output
becomes extremely unreliable and essentially useless (if you jump midway
into what lldb thinks is a unified instruction, you'll lose %rip). So we
ignore the prefix and consume all 4 bytes when disassembling a 64-bit
mode binary.

Note: in Vol. 2A 3-99 the Intel spec states that CALL rel16 is N.S. N.S.
is defined as:

    Indicates an instruction syntax that requires an address override
    prefix in 64-bit mode and is not supported. Using an address
    override prefix in 64-bit mode may result in model-specific
    execution behavior. (Vol. 2A 3-7)

Since 0x66 is an operand override prefix we should be OK (although we
may want to warn about 0x67 prefixes to 0xe8). On the CPUs I tested
with, they all ignore the 0x66 prefix in 64-bit mode.

Patch by Matthew Barney!

Differential Revision: http://reviews.llvm.org/D9573

llvm-svn: 246038
2015-08-26 16:20:29 +00:00
..
avx-512.txt AVX-512: Added all forms of FP compare instructions for KNL and SKX. 2015-05-07 11:24:42 +00:00
fp-stack.txt
hex-immediates.txt llvm-mc: Add option for prefering hex format disassembly. 2014-06-11 20:26:40 +00:00
intel-syntax-32.txt [X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LEA variants in Intel syntax. The memory operand is inherently unsized. 2015-01-08 07:41:30 +00:00
intel-syntax.txt [X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LEA variants in Intel syntax. The memory operand is inherently unsized. 2015-01-08 07:41:30 +00:00
invalid-VEX-vvvv.txt
lit.local.cfg Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
marked-up.txt
missing-sib.txt
moffs.txt [X86] Make the instructions that use AdSize16/32/64 co-exist together without using mode predicates. 2015-01-02 07:02:25 +00:00
padlock.txt
prefixes.txt [X86] Disassembler support for move to/from %rax with a 32-bit memory offset is REX.W and AdSize prefix are both present. 2015-01-03 00:00:20 +00:00
simple-tests.txt [X86] Add support for parsing and printing the mnemonic aliases for the XOP VPCOM instructions. 2015-02-13 07:42:25 +00:00
truncated-input.txt
x86-16.txt [X86]: Correctly sign-extend 16-bit immediate in CALL instruction. 2015-06-26 16:58:59 +00:00
x86-32.txt [X86]: Correctly sign-extend 16-bit immediate in CALL instruction. 2015-06-26 16:58:59 +00:00
x86-64.txt [llvm-mc] Ignore opcode size prefix in 64-bit CALL disassembly 2015-08-26 16:20:29 +00:00