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llvm-mirror/unittests/Target
Scott Linder 3a0c436c93 [AMDGPU] Fix PC register mapping in wave32 mode
Summary:
The PC_32 DWARF register is for a 32-bit process address space which we
don't implement in AMDGCN; another way of putting this is that the size
of the PC register is not a function of the wavefront size. If we ever
implement a 32-bit process address space we will need to add two more
DwarfFlavours i.e. we will need to represent the product of (wave32,
wave64) x (64-bit address space, 32-bit address space).

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76732
2020-03-26 14:43:25 -04:00
..
AArch64 Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
AMDGPU [AMDGPU] Fix PC register mapping in wave32 mode 2020-03-26 14:43:25 -04:00
ARM [ARM][MVE] Add HorizontalReduction flag 2020-03-25 11:12:03 +00:00
PowerPC [NFC][PowerPC] Remove unnecessary link components. 2020-01-16 21:22:51 -05:00
WebAssembly CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
X86 [PGO][PGSO] Distinguish queries from unit tests and explicitly enable for the existing IR passes only. NFC. 2019-12-04 09:35:50 -08:00
CMakeLists.txt