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History

Rafael Espindola a96c205e12 add optional input flag to FMRRD llvm-svn: 30774		2006-10-06 20:33:26 +00:00
..
.cvsignore	Ignore generated files	2006-05-27 01:23:30 +00:00
ARM.h	Implement a MachineFunctionPass to fix the mul instruction	2006-09-19 15:49:25 +00:00
ARM.td	getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.	2006-05-18 00:12:58 +00:00
ARMAsmPrinter.cpp	Pass the MachineFunction into EmitJumpTableInfo.	2006-10-05 03:01:21 +00:00
ARMFrameInfo.h	use @ for comments	2006-08-25 17:55:16 +00:00
ARMInstrInfo.cpp	add shifts to addressing mode 1	2006-09-13 12:09:43 +00:00
ARMInstrInfo.h	change the addressing mode of the str instruction to reg+imm	2006-08-08 20:35:03 +00:00
ARMInstrInfo.td	add optional input flag to FMRRD	2006-10-06 20:33:26 +00:00
ARMISelDAGToDAG.cpp	add optional input flag to FMRRD	2006-10-06 20:33:26 +00:00
ARMMul.cpp	fix header	2006-09-19 16:41:40 +00:00
ARMRegisterInfo.cpp	fix the stack alignment	2006-10-06 14:29:47 +00:00
ARMRegisterInfo.h	getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.	2006-05-18 00:12:58 +00:00
ARMRegisterInfo.td	fix the names of the 64bit fp register	2006-10-02 19:30:56 +00:00
ARMTargetAsmInfo.cpp	Break out target asm info into separate files.	2006-09-07 22:05:02 +00:00
ARMTargetAsmInfo.h	Break out target asm info into separate files.	2006-09-07 22:05:02 +00:00
ARMTargetMachine.cpp	Implement a MachineFunctionPass to fix the mul instruction	2006-09-19 15:49:25 +00:00
ARMTargetMachine.h	Implement a MachineFunctionPass to fix the mul instruction	2006-09-19 15:49:25 +00:00
Makefile
README.txt	Implement floating point constants	2006-10-03 17:27:58 +00:00

README.txt

//===---------------------------------------------------------------------===//
// Random ideas for the ARM backend.
//===---------------------------------------------------------------------===//

Consider implementing a select with two conditional moves:

cmp x, y
moveq dst, a
movne dst, b

----------------------------------------------------------


%tmp1 = shl int %b, ubyte %c
%tmp4 = add int %a, %tmp1

compiles to

add r0, r0, r1, lsl r2

but

%tmp1 = shl int %b, ubyte %c
%tmp4 = add int %tmp1, %a

compiles to
mov r1, r1, lsl r2
add r0, r1, r0

----------------------------------------------------------

add an offset to FLDS addressing mode

----------------------------------------------------------