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b9df9119fc
- Make code easier to maintain. - Avoid generating waitcnts for VMEM if the address sppace does not involve VMEM. - Add support to generate waitcnts for LDS and GDS memory. Differential Revision: https://reviews.llvm.org/D47504 llvm-svn: 334241
44 lines
1.7 KiB
LLVM
44 lines
1.7 KiB
LLVM
; RUN: not llc -mtriple=amdgcn-amd- -mcpu=gfx803 -verify-machineinstrs < %s 2>&1 | FileCheck %s
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; RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -verify-machineinstrs < %s 2>&1 | FileCheck %s
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; CHECK: error: <unknown>:0:0: in function invalid_fence void (): Unsupported atomic synchronization scope
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define amdgpu_kernel void @invalid_fence() {
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entry:
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fence syncscope("invalid") seq_cst
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ret void
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}
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; CHECK: error: <unknown>:0:0: in function invalid_load void (i32*, i32*): Unsupported non-inclusive atomic synchronization scope
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define amdgpu_kernel void @invalid_load(
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i32* %in, i32* %out) {
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entry:
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%val = load atomic i32, i32* %in syncscope("invalid") seq_cst, align 4
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store i32 %val, i32* %out
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ret void
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}
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; CHECK: error: <unknown>:0:0: in function invalid_store void (i32, i32*): Unsupported non-inclusive atomic synchronization scope
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define amdgpu_kernel void @invalid_store(
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i32 %in, i32* %out) {
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entry:
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store atomic i32 %in, i32* %out syncscope("invalid") seq_cst, align 4
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ret void
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}
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; CHECK: error: <unknown>:0:0: in function invalid_cmpxchg void (i32*, i32, i32): Unsupported non-inclusive atomic synchronization scope
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define amdgpu_kernel void @invalid_cmpxchg(
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i32* %out, i32 %in, i32 %old) {
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entry:
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%gep = getelementptr i32, i32* %out, i32 4
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%val = cmpxchg volatile i32* %gep, i32 %old, i32 %in syncscope("invalid") seq_cst seq_cst
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ret void
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}
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; CHECK: error: <unknown>:0:0: in function invalid_rmw void (i32*, i32): Unsupported non-inclusive atomic synchronization scope
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define amdgpu_kernel void @invalid_rmw(
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i32* %out, i32 %in) {
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entry:
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%val = atomicrmw volatile xchg i32* %out, i32 %in syncscope("invalid") seq_cst
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ret void
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}
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