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llvm-mirror/test/CodeGen/BPF/32-bit-subreg-peephole-phi-1.ll
Yonghong Song 1efbe554a0 [BPF] Fix a bug in peephole optimization
One of current peephole optimiations is to remove SLL/SRL if
the sub register has been zero extended. This phase has two bugs
and one limitations.

First, for the physical subregister used in pseudo insn COPY
like below, it permits incorrect optimization.
    %0:gpr32 = COPY $w0
    ...
    %4:gpr = MOV_32_64 %0:gpr32
    %5:gpr = SLL_ri %4:gpr(tied-def 0), 32
    %6:gpr = SRA_ri %5:gpr(tied-def 0), 32
The $w0 could be from the return value of a previous function call
and its upper 32-bit value might contain some non-zero values.
The same applies to function arguments.

Second, the current code may permits removing SLL/SRA like below:
    %0:gpr32 = COPY $w0
    %1:gpr32 = COPY %0:gpr32
    ...
    %4:gpr = MOV_32_64 %1:gpr32
    %5:gpr = SLL_ri %4:gpr(tied-def 0), 32
    %6:gpr = SRA_ri %5:gpr(tied-def 0), 32
The reason is that it did not follow def-use chain to skip all
intermediate 32bit-to-32bit COPY instructions.

The current implementation is also very conservative for PHI
instructions. If any PHI insn component is another PHI or COPY insn,
it will just permit SLL/SRA.

This patch fixed the issue as follows:
 - During def/use chain traversal, if any physical register is read,
   SLL/SRA will be preserved as these physical registers are mostly
   from function return values or current function arguments.
 - Recursively visit all COPY and PHI instructions.
2019-11-20 15:19:59 -08:00

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1.0 KiB
LLVM

; RUN: llc -O2 -march=bpfel -mcpu=v2 -mattr=+alu32 < %s | FileCheck %s
;
; For the below test case, 'b' in 'ret == b' needs SLL/SLR.
; 'ret' in 'ret == b' does not need SLL/SLR as all 'ret' values
; are assigned through 'w<reg> = <value>' alu32 operations.
;
; extern int helper(int);
; int test(int a, int b, int c, int d) {
; int ret;
; if (a < b)
; ret = (c < d) ? -1 : 0;
; else
; ret = (c < a) ? 1 : 2;
; return helper(ret == b);
; }
define dso_local i32 @test(i32 %a, i32 %b, i32 %c, i32 %d) local_unnamed_addr {
entry:
%cmp = icmp slt i32 %a, %b
%cmp1 = icmp slt i32 %c, %d
%cond = sext i1 %cmp1 to i32
%cmp2 = icmp slt i32 %c, %a
%cond3 = select i1 %cmp2, i32 1, i32 2
%ret.0 = select i1 %cmp, i32 %cond, i32 %cond3
%cmp4 = icmp eq i32 %ret.0, %b
%conv = zext i1 %cmp4 to i32
%call = tail call i32 @helper(i32 %conv)
ret i32 %call
}
; CHECK: r{{[0-9]+}} >>= 32
; CHECK-NOT: r{{[0-9]+}} >>= 32
; CHECK: if r{{[0-9]+}} == r{{[0-9]+}} goto
declare dso_local i32 @helper(i32) local_unnamed_addr