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1efbe554a0
One of current peephole optimiations is to remove SLL/SRL if
the sub register has been zero extended. This phase has two bugs
and one limitations.
First, for the physical subregister used in pseudo insn COPY
like below, it permits incorrect optimization.
%0:gpr32 = COPY $w0
...
%4:gpr = MOV_32_64 %0:gpr32
%5:gpr = SLL_ri %4:gpr(tied-def 0), 32
%6:gpr = SRA_ri %5:gpr(tied-def 0), 32
The $w0 could be from the return value of a previous function call
and its upper 32-bit value might contain some non-zero values.
The same applies to function arguments.
Second, the current code may permits removing SLL/SRA like below:
%0:gpr32 = COPY $w0
%1:gpr32 = COPY %0:gpr32
...
%4:gpr = MOV_32_64 %1:gpr32
%5:gpr = SLL_ri %4:gpr(tied-def 0), 32
%6:gpr = SRA_ri %5:gpr(tied-def 0), 32
The reason is that it did not follow def-use chain to skip all
intermediate 32bit-to-32bit COPY instructions.
The current implementation is also very conservative for PHI
instructions. If any PHI insn component is another PHI or COPY insn,
it will just permit SLL/SRA.
This patch fixed the issue as follows:
- During def/use chain traversal, if any physical register is read,
SLL/SRA will be preserved as these physical registers are mostly
from function return values or current function arguments.
- Recursively visit all COPY and PHI instructions.
123 lines
3.2 KiB
LLVM
123 lines
3.2 KiB
LLVM
; RUN: llc -O2 -march=bpfel -mcpu=v2 -mattr=+alu32 < %s | FileCheck %s
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;
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; long long select_u(unsigned a, unsigned b, long long c, long long d)
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; {
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; if (a > b)
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; return c;
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; else
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; return d;
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; }
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;
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; long long select_u_2(unsigned a, unsigned long long b, long long c, long long d)
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; {
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; if (a > b)
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; return c;
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; else
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; return d;
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; }
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;
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; long long select_s(signed a, signed b, long long c, long long d)
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; {
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; if (a > b)
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; return c;
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; else
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; return d;
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; }
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;
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; long long bar ();
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;
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; int foo (int b, int c)
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; {
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; unsigned int i32_val = (unsigned int) bar();
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;
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; if (i32_val < 10)
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; return b;
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; else
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; return c;
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; }
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;
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; int *inc_p (int *p, unsigned a)
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; {
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; return p + a;
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; }
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; Function Attrs: norecurse nounwind readnone
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define dso_local i64 @select_u(i32 %a, i32 %b, i64 %c, i64 %d) local_unnamed_addr #0 {
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; CHECK-LABEL: select_u:
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entry:
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%cmp = icmp ugt i32 %a, %b
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%c.d = select i1 %cmp, i64 %c, i64 %d
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; CHECK: r{{[0-9]+}} <<= 32
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; CHECK-NEXT: r{{[0-9]+}} >>= 32
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; CHECK: if r{{[0-9]+}} {{<|>}} r{{[0-9]+}} goto
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ret i64 %c.d
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}
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; Function Attrs: norecurse nounwind readnone
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define dso_local i64 @select_u_2(i32 %a, i64 %b, i64 %c, i64 %d) local_unnamed_addr #0 {
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; CHECK-LABEL: select_u_2:
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entry:
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%conv = zext i32 %a to i64
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; CHECK: r{{[0-9]+}} <<= 32
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; CHECK-NEXT: r{{[0-9]+}} >>= 32
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%cmp = icmp ugt i64 %conv, %b
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%c.d = select i1 %cmp, i64 %c, i64 %d
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ret i64 %c.d
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}
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; Function Attrs: norecurse nounwind readnone
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define dso_local i64 @select_s(i32 %a, i32 %b, i64 %c, i64 %d) local_unnamed_addr #0 {
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; CHECK-LABEL: select_s:
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entry:
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%cmp = icmp sgt i32 %a, %b
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%c.d = select i1 %cmp, i64 %c, i64 %d
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; CHECK: r{{[0-9]+}} <<= 32
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; CHECK-NEXT: r{{[0-9]+}} s>>= 32
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; CHECK: if r{{[0-9]+}} s{{<|>}} r{{[0-9]+}} goto
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ret i64 %c.d
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}
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; Function Attrs: nounwind
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define dso_local i32 @foo(i32 %b, i32 %c) local_unnamed_addr #0 {
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; CHECK-LABEL: foo:
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entry:
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%call = tail call i64 bitcast (i64 (...)* @bar to i64 ()*)() #2
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%conv = trunc i64 %call to i32
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%cmp = icmp ult i32 %conv, 10
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; The shifts can't be optimized out because %call comes from function call
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; returning i64 so the high bits might be valid.
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; CHECK: r{{[0-9]+}} <<= 32
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; CHECK-NEXT: r{{[0-9]+}} >>= 32
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%b.c = select i1 %cmp, i32 %b, i32 %c
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; CHECK: if r{{[0-9]+}} {{<|>}} {{[0-9]+}} goto
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ret i32 %b.c
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}
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declare dso_local i64 @bar(...) local_unnamed_addr #1
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; Function Attrs: norecurse nounwind readnone
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define dso_local i32* @inc_p(i32* readnone %p, i32 %a) local_unnamed_addr #0 {
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; CHECK-LABEL: inc_p:
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entry:
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%idx.ext = zext i32 %a to i64
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; CHECK: r{{[0-9]+}} <<= 32
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; CHECK-NEXT: r{{[0-9]+}} >>= 32
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%add.ptr = getelementptr inbounds i32, i32* %p, i64 %idx.ext
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ret i32* %add.ptr
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}
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define dso_local i32 @test() local_unnamed_addr {
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; CHECK-LABEL: test:
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entry:
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%call = tail call i32 bitcast (i32 (...)* @helper to i32 ()*)()
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%cmp = icmp sgt i32 %call, 6
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; The shifts can't be optimized out because %call comes from function call
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; return i32 so the high bits might be invalid.
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; CHECK: r{{[0-9]+}} <<= 32
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; CHECK-NEXT: r{{[0-9]+}} s>>= 32
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%cond = zext i1 %cmp to i32
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; CHECK: if r{{[0-9]+}} s{{<|>}} {{[0-9]+}} goto
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ret i32 %cond
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}
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declare dso_local i32 @helper(...) local_unnamed_addr
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