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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 19:42:54 +02:00
llvm-mirror/test/MC
Nirav Dave ad117417c8 [MC] Prevent out of order HashDirective lexing in AsmLexer.
To lex hash directives we peek ahead to find component tokens, create a
unified token, and unlex the peeked tokens so the parser does not need
to parse the tokens then. Make sure we do not to lex another hash
directive during peek operation.

This fixes PR28921.

Reviewers: rnk, loladiro

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D24839

llvm-svn: 282992
2016-10-01 00:42:32 +00:00
..
AArch64 AArch64: Set shift bit of TLSLE HI12 add instruction 2016-09-29 01:05:48 +00:00
AMDGPU Revert "[AMDGPU] Disassembler: print label names in branch instructions" 2016-09-26 11:29:03 +00:00
ARM Emit S_COMPILE3 CodeView record 2016-09-20 17:20:51 +00:00
AsmParser [MC] Prevent out of order HashDirective lexing in AsmLexer. 2016-10-01 00:42:32 +00:00
COFF Emit S_COMPILE3 CodeView record 2016-09-20 17:20:51 +00:00
Disassembler [mips] Add rsqrt, recip for MIPS 2016-09-27 12:25:15 +00:00
ELF Add initial support for R_386_GOT32X. 2016-07-06 21:19:11 +00:00
Hexagon [Hexagon] Fix disassembler crash after r279255 2016-09-09 21:45:00 +00:00
Lanai [lanai] Add more tests for assembly of conditional ALU ops 2016-07-11 17:58:16 +00:00
MachO CodeGen: Use PLT relocations for relative references to unnamed_addr functions. 2016-04-22 20:40:10 +00:00
Markup
Mips [mips] Add rsqrt, recip for MIPS 2016-09-27 12:25:15 +00:00
PowerPC [PowerPC] Support asm parsing for bc[l][a][+-] mnemonics 2016-09-03 02:31:44 +00:00
Sparc Don't pass a Reloc::Model to MC. 2016-05-18 11:58:50 +00:00
SystemZ [SystemZ] Add support for the .insn directive 2016-08-08 15:13:08 +00:00
X86 [x86] Accept 'retn' as an alias to 'ret[lqw]'\'ret' (At&t\Intel) 2016-09-28 15:52:56 +00:00