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llvm-mirror/lib/Target/AMDGPU/MCTargetDesc
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Nicolai Haehnle 983fb26188 AMDGPU: Use an ABS32_LO relocation for SCRATCH_RSRC_DWORD1 
Summary:
Using HI here makes no logical sense, since the dword is only
32 bits to begin with.

Current Mesa master does not look at the relocation type at all,
so this change is fine. Future Mesa will rely on this, however.

Change-Id: I91085707834c4ac0370926602b93c94b90e44cb1

Reviewers: arsenm, rampitec, mareko

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D55369

llvm-svn: 349620
2018-12-19 11:55:03 +00:00
..
AMDGPUAsmBackend.cpp [MC] Pass MCSubtargetInfo to fixupNeedsRelaxation and applyFixup 2018-06-06 09:40:06 +00:00
AMDGPUELFObjectWriter.cpp AMDGPU: Use an ABS32_LO relocation for SCRATCH_RSRC_DWORD1 2018-12-19 11:55:03 +00:00
AMDGPUELFStreamer.cpp MC: Change the streamer ctors to take an object writer instead of a stream. NFCI. 2018-05-18 18:26:45 +00:00
AMDGPUELFStreamer.h MC: Change the streamer ctors to take an object writer instead of a stream. NFCI. 2018-05-18 18:26:45 +00:00
AMDGPUFixupKinds.h
AMDGPUMCAsmInfo.cpp
AMDGPUMCAsmInfo.h
AMDGPUMCCodeEmitter.cpp Remove \brief commands from doxygen comments. 2018-05-01 15:54:18 +00:00
AMDGPUMCCodeEmitter.h Remove \brief commands from doxygen comments. 2018-05-01 15:54:18 +00:00
AMDGPUMCTargetDesc.cpp AMDGPU: Separate R600 and GCN TableGen files 2018-06-28 23:47:12 +00:00
AMDGPUMCTargetDesc.h AMDGPU: Separate R600 and GCN TableGen files 2018-06-28 23:47:12 +00:00
AMDGPUTargetStreamer.cpp [AMDGPU] Emit MessagePack HSA Metadata for v3 code object 2018-12-12 19:39:27 +00:00
AMDGPUTargetStreamer.h [AMDGPU] Emit MessagePack HSA Metadata for v3 code object 2018-12-12 19:39:27 +00:00
CMakeLists.txt [AMDGPU] Fix layering issue with AMDGPUHSAMetadataStreamer (NFC) 2018-07-10 20:07:22 +00:00
LLVMBuild.txt [AMDGPU] Emit MessagePack HSA Metadata for v3 code object 2018-12-12 19:39:27 +00:00
R600MCCodeEmitter.cpp AMDGPU: Separate R600 and GCN TableGen files 2018-06-28 23:47:12 +00:00
R600MCTargetDesc.cpp AMDGPU: Separate R600 and GCN TableGen files 2018-06-28 23:47:12 +00:00
SIMCCodeEmitter.cpp AMDGPU: Separate R600 and GCN TableGen files 2018-06-28 23:47:12 +00:00