..
AsmParser
[AMDGPU][MC] New syntax for ds_swizzle_b32 offset
2017-05-31 16:26:47 +00:00
Disassembler
[AMDGPU] SDWA: add disassembler support for GFX9
2017-05-26 15:52:00 +00:00
InstPrinter
[AMDGPU][MC] New syntax for ds_swizzle_b32 offset
2017-05-31 16:26:47 +00:00
MCTargetDesc
[AMDGPU][MC][GFX9] Corrected encoding of flat_scratch* for SDWA opcodes
2017-05-26 18:01:29 +00:00
TargetInfo
Utils
[AMDGPU][MC] New syntax for ds_swizzle_b32 offset
2017-05-31 16:26:47 +00:00
AMDGPU.h
[LegacyPassManager] Remove TargetMachine constructors
2017-05-18 17:21:13 +00:00
AMDGPU.td
[AMDGPU] SDWA: Add assembler support for GFX9
2017-05-23 10:08:55 +00:00
AMDGPUAliasAnalysis.cpp
[IR] Make getParamAttributes take argument numbers, not ArgNo+1
2017-04-13 23:12:13 +00:00
AMDGPUAliasAnalysis.h
AMDGPU/R600: Fix amdgpu alias analysis pass.
2017-03-31 19:26:23 +00:00
AMDGPUAlwaysInlinePass.cpp
[AMDGPU] Add GlobalOpt parameter to Always Inliner pass
2017-03-30 20:16:02 +00:00
AMDGPUAnnotateKernelFeatures.cpp
[LegacyPassManager] Remove TargetMachine constructors
2017-05-18 17:21:13 +00:00
AMDGPUAnnotateUniformValues.cpp
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUAsmPrinter.cpp
AMDGPU/AMDHSA: Set COMPUTE_PGM_RSRC2:LDS_SIZE to 0
2017-05-05 20:13:55 +00:00
AMDGPUAsmPrinter.h
AMDGPU: Refactor AsmPrinter
2017-05-02 17:14:00 +00:00
AMDGPUCallingConv.td
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
AMDGPUCallLowering.cpp
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUCallLowering.h
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
AMDGPUCodeGenPrepare.cpp
[LegacyPassManager] Remove TargetMachine constructors
2017-05-18 17:21:13 +00:00
AMDGPUFrameLowering.cpp
[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
2017-03-10 19:39:07 +00:00
AMDGPUFrameLowering.h
[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
2017-03-10 19:39:07 +00:00
AMDGPUGenRegisterBankInfo.def
AMDGPUInstrInfo.cpp
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUInstrInfo.h
AMDGPU: Fix crash when disassembling VOP3 mac
2017-04-10 17:58:06 +00:00
AMDGPUInstrInfo.td
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
AMDGPUInstructions.td
[AMDGPU][MC] Added check for truncation of SOPK imm operand
2017-04-26 15:34:19 +00:00
AMDGPUInstructionSelector.cpp
AMDGPU: Remove tfe bit from flat instruction definitions
2017-05-11 17:38:33 +00:00
AMDGPUInstructionSelector.h
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUIntrinsicInfo.cpp
Rename AttributeSet to AttributeList
2017-03-21 16:57:19 +00:00
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td
AMDGPU: Remove legacy bfe intrinsics
2017-04-03 18:08:08 +00:00
AMDGPUISelDAGToDAG.cpp
Revert "AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patterns"
2017-05-24 14:53:50 +00:00
AMDGPUISelLowering.cpp
[AMDGPU] Combine and (srl) into shl (bfe)
2017-05-23 19:54:48 +00:00
AMDGPUISelLowering.h
[AMDGPU] Convert shl (add) into add (shl)
2017-05-23 15:59:58 +00:00
AMDGPULegalizerInfo.cpp
AMDGPU/GlobalISel: Mark 32-bit float constants as legal
2017-05-26 16:40:03 +00:00
AMDGPULegalizerInfo.h
AMDGPULowerIntrinsics.cpp
[LegacyPassManager] Remove TargetMachine constructors
2017-05-18 17:21:13 +00:00
AMDGPUMachineCFGStructurizer.cpp
AMDGPUCodeGen: Fix warnings in r303111. [-Wunused-variable]
2017-05-16 04:01:23 +00:00
AMDGPUMachineFunction.cpp
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
AMDGPUMachineFunction.h
AMDGPU: Rename isKernel
2017-03-30 23:58:04 +00:00
AMDGPUMCInstLower.cpp
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
AMDGPUMCInstLower.h
AMDGPUOpenCLImageTypeLoweringPass.cpp
AMDGPUPromoteAlloca.cpp
AMDGPU/SI: Move the local memory usage related checking after calling convention checking in PromoteAlloca
2017-05-23 20:25:41 +00:00
AMDGPUPTNote.h
[AMDGPU] Restructure code object metadata creation
2017-03-22 22:32:22 +00:00
AMDGPURegisterBankInfo.cpp
[RegisterBankInfo] Uniquely allocate instruction mapping.
2017-05-05 22:48:22 +00:00
AMDGPURegisterBankInfo.h
[RegisterBankInfo] Uniquely allocate instruction mapping.
2017-05-05 22:48:22 +00:00
AMDGPURegisterBanks.td
AMDGPURegisterInfo.cpp
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
AMDGPURegisterInfo.h
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp
AMDGPU: Add new subtarget features for gfx9 flat instructions
2017-05-10 21:19:05 +00:00
AMDGPUSubtarget.h
[AMDGPU] Require waitcnt before barrier for all targets; adjust tests.
2017-05-30 16:22:43 +00:00
AMDGPUTargetMachine.cpp
TargetPassConfig: Keep a reference to an LLVMTargetMachine; NFC
2017-05-30 21:36:41 +00:00
AMDGPUTargetMachine.h
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUTargetObjectFile.cpp
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUTargetObjectFile.h
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUTargetTransformInfo.cpp
AMDGPU: Make some packed shuffles free
2017-05-10 21:29:33 +00:00
AMDGPUTargetTransformInfo.h
AMDGPU: Make some packed shuffles free
2017-05-10 21:29:33 +00:00
AMDGPUUnifyDivergentExitNodes.cpp
AMDGPU: Unify divergent function exits.
2017-03-24 19:52:05 +00:00
AMDGPUUnifyMetadata.cpp
AMDILCFGStructurizer.cpp
Remove unused functions. Remove static qualifier from functions in header files. NFC.
2017-04-11 14:55:32 +00:00
AMDKernelCodeT.h
BUFInstructions.td
AMDGPU: Change mubuf soffset register when SP relative
2017-05-17 21:02:58 +00:00
CaymanInstructions.td
CIInstructions.td
CMakeLists.txt
Re-submit AMDGPUMachineCFGStructurizer.
2017-05-15 20:18:37 +00:00
DSInstructions.td
[AMDGPU][MC] New syntax for ds_swizzle_b32 offset
2017-05-31 16:26:47 +00:00
EvergreenInstructions.td
AMDGPU: Fix unnecessary ands when packing f16 vectors
2017-03-15 19:04:26 +00:00
FLATInstructions.td
AMDGPU: Remove tfe bit from flat instruction definitions
2017-05-11 17:38:33 +00:00
GCNHazardRecognizer.cpp
AMDGPU: Fix broken condition in hazard recognizer
2017-03-17 21:36:28 +00:00
GCNHazardRecognizer.h
AMDGPU: Fix broken condition in hazard recognizer
2017-03-17 21:36:28 +00:00
GCNIterativeScheduler.cpp
Make helper functions static. NFC.
2017-05-26 20:09:00 +00:00
GCNIterativeScheduler.h
[AMDGPU] Iterative scheduling infrastructure + minimal registry scheduler
2017-03-21 13:15:46 +00:00
GCNMinRegStrategy.cpp
Make helper functions static. NFC.
2017-05-26 20:09:00 +00:00
GCNRegPressure.cpp
Make helper functions static. NFC.
2017-05-26 20:09:00 +00:00
GCNRegPressure.h
[AMDGPU] Fix incorrect register usage tracking in GCNUpwardTracker
2017-05-22 13:09:40 +00:00
GCNSchedStrategy.cpp
[AMDGPU] Use GCNRPTracker dumper methods in scheduler
2017-05-16 16:31:45 +00:00
GCNSchedStrategy.h
[AMDGPU] Cache live-ins and register pressure in scheduler
2017-05-16 16:11:26 +00:00
LLVMBuild.txt
MIMGInstructions.td
AMDGPU: Remove legacy image intrinsics
2017-04-04 16:34:35 +00:00
Processors.td
R600ClauseMergePass.cpp
[LegacyPassManager] Remove TargetMachine constructors
2017-05-18 17:21:13 +00:00
R600ControlFlowFinalizer.cpp
[LegacyPassManager] Remove TargetMachine constructors
2017-05-18 17:21:13 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp
AMDGPU/R600: Fix ALU clause markers use detection
2017-03-06 20:10:05 +00:00
R600ExpandSpecialInstrs.cpp
[LegacyPassManager] Remove TargetMachine constructors
2017-05-18 17:21:13 +00:00
R600FrameLowering.cpp
[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
2017-03-10 19:39:07 +00:00
R600FrameLowering.h
[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
2017-03-10 19:39:07 +00:00
R600InstrFormats.td
R600InstrInfo.cpp
Cyle -> Cycle; NFCI
2017-03-15 15:37:42 +00:00
R600InstrInfo.h
Cyle -> Cycle; NFCI
2017-03-15 15:37:42 +00:00
R600Instructions.td
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
R600Intrinsics.td
AMDGPU: Make intrinsics speculatable
2017-05-02 16:57:44 +00:00
R600ISelLowering.cpp
[AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI.
2017-05-24 15:59:09 +00:00
R600ISelLowering.h
[AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI.
2017-05-24 15:59:09 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
[LegacyPassManager] Remove TargetMachine constructors
2017-05-18 17:21:13 +00:00
R600Packetizer.cpp
[LegacyPassManager] Remove TargetMachine constructors
2017-05-18 17:21:13 +00:00
R600RegisterInfo.cpp
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
R600RegisterInfo.h
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
R600RegisterInfo.td
[AMDGPU] Add INDIRECT_BASE_ADDR to R600_Reg32 class (PR33045)
2017-05-23 21:27:15 +00:00
R600Schedule.td
R700Instructions.td
SIAnnotateControlFlow.cpp
Remove now useless trailing nullptr in StructType::get
2017-05-11 08:46:02 +00:00
SIDebuggerInsertNops.cpp
SIDefines.h
[AMDGPU][MC] New syntax for ds_swizzle_b32 offset
2017-05-31 16:26:47 +00:00
SIFixControlFlowLiveIntervals.cpp
SIFixSGPRCopies.cpp
AMDGPU: Fix copies from physical registers in SIFixSGPRCopies
2017-04-29 01:26:34 +00:00
SIFixVGPRCopies.cpp
SIFoldOperands.cpp
[AMDGPU] Allow SDWA in instructions with immediates and SGPRs
2017-05-30 16:49:24 +00:00
SIFrameLowering.cpp
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
SIFrameLowering.h
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
SIInsertSkips.cpp
AMDGPU: Rename SI_RETURN
2017-03-21 22:18:10 +00:00
SIInsertWaitcnts.cpp
[AMDGPU] Fix bugs in new waitcnt pass. Add test.
2017-05-31 16:44:23 +00:00
SIInsertWaits.cpp
Move size and alignment information of regclass to TargetRegisterInfo
2017-04-24 18:55:33 +00:00
SIInstrFormats.td
[AMDGPU][MC] Fixed bugs in export instruction
2017-05-19 13:36:09 +00:00
SIInstrInfo.cpp
AMDGPU/GlobalISel: Mark 32-bit float constants as legal
2017-05-26 16:40:03 +00:00
SIInstrInfo.h
Re-submit AMDGPUMachineCFGStructurizer.
2017-05-15 20:18:37 +00:00
SIInstrInfo.td
[AMDGPU][MC] New syntax for ds_swizzle_b32 offset
2017-05-31 16:26:47 +00:00
SIInstructions.td
Re-submit AMDGPUMachineCFGStructurizer.
2017-05-15 20:18:37 +00:00
SIIntrinsics.td
AMDGPU: Remove legacy export intrinsic
2017-04-04 16:34:39 +00:00
SIISelLowering.cpp
[AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI.
2017-05-24 15:59:09 +00:00
SIISelLowering.h
[AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI.
2017-05-24 15:59:09 +00:00
SILoadStoreOptimizer.cpp
[LegacyPassManager] Remove TargetMachine constructors
2017-05-18 17:21:13 +00:00
SILowerControlFlow.cpp
SILowerI1Copies.cpp
SIMachineFunctionInfo.cpp
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
SIMachineFunctionInfo.h
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
SIMachineScheduler.cpp
[AMDGPU] Update SI scheduler colorHighLatenciesGroups
2017-03-28 07:19:48 +00:00
SIMachineScheduler.h
[AMDGPU] Update SI scheduler colorHighLatenciesGroups
2017-03-28 07:19:48 +00:00
SIOptimizeExecMasking.cpp
SIPeepholeSDWA.cpp
[AMDGPU] Allow SDWA in instructions with immediates and SGPRs
2017-05-30 16:49:24 +00:00
SIRegisterInfo.cpp
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
SIRegisterInfo.h
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
SIRegisterInfo.td
AMDGPU: Fix not including v2i16/v2f16 in register class
2017-03-21 16:42:50 +00:00
SISchedule.td
SIShrinkInstructions.cpp
SITypeRewriter.cpp
SIWholeQuadMode.cpp
SMInstructions.td
Revert "AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patterns"
2017-05-24 14:53:50 +00:00
SOPInstructions.td
Resubmit r303859 with test fixed.
2017-05-26 20:38:26 +00:00
VIInstrFormats.td
VIInstructions.td
VOP1Instructions.td
[AMDGPU] SDWA: Add assembler support for GFX9
2017-05-23 10:08:55 +00:00
VOP2Instructions.td
[AMDGPU] SDWA: Add assembler support for GFX9
2017-05-23 10:08:55 +00:00
VOP3Instructions.td
[AMDGPU] SDWA: Add assembler support for GFX9
2017-05-23 10:08:55 +00:00
VOP3PInstructions.td
AMDGPU: Support v2i16/v2f16 packed operations
2017-02-27 22:15:25 +00:00
VOPCInstructions.td
[AMDGPU] SDWA: Add assembler support for GFX9
2017-05-23 10:08:55 +00:00
VOPInstructions.td
[AMDGPU] SDWA: Add assembler support for GFX9
2017-05-23 10:08:55 +00:00