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llvm-mirror/test/CodeGen/Thumb/long-setcc.ll
Eli Friedman ac1b7ad93f [ARM] Add missing pseudo-instruction for Thumb1 RSBS.
Shows up rarely for 64-bit arithmetic, more frequently for the compare
patterns added in r325323.

Differential Revision: https://reviews.llvm.org/D53848

llvm-svn: 345782
2018-10-31 21:45:48 +00:00

26 lines
436 B
LLVM

; RUN: llc -mtriple=thumb-eabi < %s | FileCheck %s
define i1 @t1(i64 %x) {
; CHECK-LABEL: t1:
; CHECK: lsrs r0, r1, #31
%B = icmp slt i64 %x, 0
ret i1 %B
}
define i1 @t2(i64 %x) {
; CHECK-LABEL: t2:
; CHECK: rsbs r0, r1, #0
; CHECK: adcs r0, r1
%tmp = icmp ult i64 %x, 4294967296
ret i1 %tmp
}
define i1 @t3(i32 %x) {
; CHECK-LABEL: t3:
; CHECK: movs r0, #0
%tmp = icmp ugt i32 %x, -1
ret i1 %tmp
}
; CHECK-NOT: cmp