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llvm-mirror/test/CodeGen
Arnold Schwaighofer 6c2abdd13e We also need to pass swifterror in R12 under swiftcc not only under ccc
rdar://28190687

llvm-svn: 281138
2016-09-10 14:16:55 +00:00
..
AArch64 GlobalISel: remove G_TYPE and G_PHI 2016-09-09 11:47:31 +00:00
AMDGPU AMDGPU: Fix immediate folding logic when shrinking instructions 2016-09-09 23:32:53 +00:00
ARM [ARM] ADD with a negative offset can become SUB for free 2016-09-09 13:35:36 +00:00
BPF
Generic CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses 2016-08-24 01:52:46 +00:00
Hexagon [RDF] Further improve handling of multiple phis reached from shadows 2016-09-08 20:48:42 +00:00
Inputs
Lanai
Mips Revert "[mips] Fix c.<cc>.<fmt> instruction definition." 2016-09-09 11:06:01 +00:00
MIR GlobalISel: move type information to MachineRegisterInfo. 2016-09-09 11:46:34 +00:00
MSP430 Revert r279242 - it's failing the tests 2016-08-19 14:18:34 +00:00
NVPTX [NVPTX] Implement llvm.fabs.f32, llvm.max.f32, etc. 2016-09-09 21:07:26 +00:00
PowerPC [PowerPC] Fix address-offset folding for plain addi 2016-09-07 07:36:11 +00:00
SPARC [Sparc][LEON] Removed the parts of the errata fixes implemented using inline assembly as this is not the desired behaviour for end-users. Small change to a unit test to implement this without requiring the inline assembly. 2016-09-09 14:16:51 +00:00
SystemZ [SystemZ] Use valid base/index regs for inline asm 2016-08-18 21:44:15 +00:00
Thumb [Thumb] Select (CMPZ X, -C) -> (CMPZ (ADDS X, C), 0) 2016-09-09 12:52:24 +00:00
Thumb2 [Thumb] Select (CMPZ X, -C) -> (CMPZ (ADDS X, C), 0) 2016-09-09 12:52:24 +00:00
WebAssembly [WebAssembly] Add asm.js-style setjmp/longjmp handling for wasm (reland r280302) 2016-09-01 21:05:15 +00:00
WinEH
X86 We also need to pass swifterror in R12 under swiftcc not only under ccc 2016-09-10 14:16:55 +00:00
XCore