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7193bf43c5
When the memory vectorizer is enabled, these tests break. These tests don't really care about the memory instructions, and it's easier to write check lines with the unmerged loads. llvm-svn: 266071
365 lines
18 KiB
LLVM
365 lines
18 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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declare { float, i1 } @llvm.amdgcn.div.scale.f32(float, float, i1) nounwind readnone
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declare { double, i1 } @llvm.amdgcn.div.scale.f64(double, double, i1) nounwind readnone
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declare float @llvm.fabs.f32(float) nounwind readnone
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; SI-LABEL: {{^}}test_div_scale_f32_1:
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; SI-DAG: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64
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; SI-DAG: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
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; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]]
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; SI: buffer_store_dword [[RESULT0]]
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; SI: s_endpgm
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define void @test_div_scale_f32_1(float addrspace(1)* %out, float addrspace(1)* %in) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep.0 = getelementptr float, float addrspace(1)* %in, i32 %tid
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%gep.1 = getelementptr float, float addrspace(1)* %gep.0, i32 1
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%a = load volatile float, float addrspace(1)* %gep.0, align 4
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%b = load volatile float, float addrspace(1)* %gep.1, align 4
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%result = call { float, i1 } @llvm.amdgcn.div.scale.f32(float %a, float %b, i1 false) nounwind readnone
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%result0 = extractvalue { float, i1 } %result, 0
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store float %result0, float addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: {{^}}test_div_scale_f32_2:
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; SI-DAG: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64
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; SI-DAG: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
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; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]]
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; SI: buffer_store_dword [[RESULT0]]
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; SI: s_endpgm
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define void @test_div_scale_f32_2(float addrspace(1)* %out, float addrspace(1)* %in) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep.0 = getelementptr float, float addrspace(1)* %in, i32 %tid
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%gep.1 = getelementptr float, float addrspace(1)* %gep.0, i32 1
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%a = load volatile float, float addrspace(1)* %gep.0, align 4
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%b = load volatile float, float addrspace(1)* %gep.1, align 4
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%result = call { float, i1 } @llvm.amdgcn.div.scale.f32(float %a, float %b, i1 true) nounwind readnone
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%result0 = extractvalue { float, i1 } %result, 0
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store float %result0, float addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: {{^}}test_div_scale_f64_1:
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; SI-DAG: buffer_load_dwordx2 [[A:v\[[0-9]+:[0-9]+\]]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64
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; SI-DAG: buffer_load_dwordx2 [[B:v\[[0-9]+:[0-9]+\]]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:8
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; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]]
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; SI: buffer_store_dwordx2 [[RESULT0]]
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; SI: s_endpgm
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define void @test_div_scale_f64_1(double addrspace(1)* %out, double addrspace(1)* %aptr, double addrspace(1)* %in) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep.0 = getelementptr double, double addrspace(1)* %in, i32 %tid
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%gep.1 = getelementptr double, double addrspace(1)* %gep.0, i32 1
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%a = load volatile double, double addrspace(1)* %gep.0, align 8
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%b = load volatile double, double addrspace(1)* %gep.1, align 8
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%result = call { double, i1 } @llvm.amdgcn.div.scale.f64(double %a, double %b, i1 false) nounwind readnone
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%result0 = extractvalue { double, i1 } %result, 0
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store double %result0, double addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: {{^}}test_div_scale_f64_2:
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; SI-DAG: buffer_load_dwordx2 [[A:v\[[0-9]+:[0-9]+\]]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64
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; SI-DAG: buffer_load_dwordx2 [[B:v\[[0-9]+:[0-9]+\]]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:8
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; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]]
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; SI: buffer_store_dwordx2 [[RESULT0]]
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; SI: s_endpgm
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define void @test_div_scale_f64_2(double addrspace(1)* %out, double addrspace(1)* %aptr, double addrspace(1)* %in) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep.0 = getelementptr double, double addrspace(1)* %in, i32 %tid
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%gep.1 = getelementptr double, double addrspace(1)* %gep.0, i32 1
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%a = load volatile double, double addrspace(1)* %gep.0, align 8
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%b = load volatile double, double addrspace(1)* %gep.1, align 8
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%result = call { double, i1 } @llvm.amdgcn.div.scale.f64(double %a, double %b, i1 true) nounwind readnone
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%result0 = extractvalue { double, i1 } %result, 0
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store double %result0, double addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: {{^}}test_div_scale_f32_scalar_num_1:
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; SI-DAG: buffer_load_dword [[B:v[0-9]+]]
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; SI-DAG: s_load_dword [[A:s[0-9]+]]
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; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]]
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; SI: buffer_store_dword [[RESULT0]]
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; SI: s_endpgm
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define void @test_div_scale_f32_scalar_num_1(float addrspace(1)* %out, float addrspace(1)* %in, float %a) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep = getelementptr float, float addrspace(1)* %in, i32 %tid
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%b = load float, float addrspace(1)* %gep, align 4
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%result = call { float, i1 } @llvm.amdgcn.div.scale.f32(float %a, float %b, i1 false) nounwind readnone
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%result0 = extractvalue { float, i1 } %result, 0
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store float %result0, float addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: {{^}}test_div_scale_f32_scalar_num_2:
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; SI-DAG: buffer_load_dword [[B:v[0-9]+]]
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; SI-DAG: s_load_dword [[A:s[0-9]+]]
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; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]]
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; SI: buffer_store_dword [[RESULT0]]
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; SI: s_endpgm
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define void @test_div_scale_f32_scalar_num_2(float addrspace(1)* %out, float addrspace(1)* %in, float %a) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep = getelementptr float, float addrspace(1)* %in, i32 %tid
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%b = load float, float addrspace(1)* %gep, align 4
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%result = call { float, i1 } @llvm.amdgcn.div.scale.f32(float %a, float %b, i1 true) nounwind readnone
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%result0 = extractvalue { float, i1 } %result, 0
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store float %result0, float addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: {{^}}test_div_scale_f32_scalar_den_1:
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; SI-DAG: buffer_load_dword [[A:v[0-9]+]]
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; SI-DAG: s_load_dword [[B:s[0-9]+]]
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; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]]
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; SI: buffer_store_dword [[RESULT0]]
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; SI: s_endpgm
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define void @test_div_scale_f32_scalar_den_1(float addrspace(1)* %out, float addrspace(1)* %in, float %b) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep = getelementptr float, float addrspace(1)* %in, i32 %tid
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%a = load float, float addrspace(1)* %gep, align 4
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%result = call { float, i1 } @llvm.amdgcn.div.scale.f32(float %a, float %b, i1 false) nounwind readnone
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%result0 = extractvalue { float, i1 } %result, 0
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store float %result0, float addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: {{^}}test_div_scale_f32_scalar_den_2:
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; SI-DAG: buffer_load_dword [[A:v[0-9]+]]
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; SI-DAG: s_load_dword [[B:s[0-9]+]]
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; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]]
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; SI: buffer_store_dword [[RESULT0]]
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; SI: s_endpgm
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define void @test_div_scale_f32_scalar_den_2(float addrspace(1)* %out, float addrspace(1)* %in, float %b) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep = getelementptr float, float addrspace(1)* %in, i32 %tid
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%a = load float, float addrspace(1)* %gep, align 4
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%result = call { float, i1 } @llvm.amdgcn.div.scale.f32(float %a, float %b, i1 true) nounwind readnone
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%result0 = extractvalue { float, i1 } %result, 0
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store float %result0, float addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: {{^}}test_div_scale_f64_scalar_num_1:
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; SI-DAG: buffer_load_dwordx2 [[B:v\[[0-9]+:[0-9]+\]]]
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; SI-DAG: s_load_dwordx2 [[A:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xd
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; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]]
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; SI: buffer_store_dwordx2 [[RESULT0]]
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; SI: s_endpgm
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define void @test_div_scale_f64_scalar_num_1(double addrspace(1)* %out, double addrspace(1)* %in, double %a) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep = getelementptr double, double addrspace(1)* %in, i32 %tid
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%b = load double, double addrspace(1)* %gep, align 8
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%result = call { double, i1 } @llvm.amdgcn.div.scale.f64(double %a, double %b, i1 false) nounwind readnone
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%result0 = extractvalue { double, i1 } %result, 0
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store double %result0, double addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: {{^}}test_div_scale_f64_scalar_num_2:
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; SI-DAG: s_load_dwordx2 [[A:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xd
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; SI-DAG: buffer_load_dwordx2 [[B:v\[[0-9]+:[0-9]+\]]]
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; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]]
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; SI: buffer_store_dwordx2 [[RESULT0]]
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; SI: s_endpgm
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define void @test_div_scale_f64_scalar_num_2(double addrspace(1)* %out, double addrspace(1)* %in, double %a) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep = getelementptr double, double addrspace(1)* %in, i32 %tid
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%b = load double, double addrspace(1)* %gep, align 8
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%result = call { double, i1 } @llvm.amdgcn.div.scale.f64(double %a, double %b, i1 true) nounwind readnone
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%result0 = extractvalue { double, i1 } %result, 0
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store double %result0, double addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: {{^}}test_div_scale_f64_scalar_den_1:
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; SI-DAG: buffer_load_dwordx2 [[A:v\[[0-9]+:[0-9]+\]]]
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; SI-DAG: s_load_dwordx2 [[B:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xd
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; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]]
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; SI: buffer_store_dwordx2 [[RESULT0]]
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; SI: s_endpgm
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define void @test_div_scale_f64_scalar_den_1(double addrspace(1)* %out, double addrspace(1)* %in, double %b) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep = getelementptr double, double addrspace(1)* %in, i32 %tid
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%a = load double, double addrspace(1)* %gep, align 8
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%result = call { double, i1 } @llvm.amdgcn.div.scale.f64(double %a, double %b, i1 false) nounwind readnone
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%result0 = extractvalue { double, i1 } %result, 0
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store double %result0, double addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: {{^}}test_div_scale_f64_scalar_den_2:
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; SI-DAG: buffer_load_dwordx2 [[A:v\[[0-9]+:[0-9]+\]]]
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; SI-DAG: s_load_dwordx2 [[B:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xd
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; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]]
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; SI: buffer_store_dwordx2 [[RESULT0]]
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; SI: s_endpgm
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define void @test_div_scale_f64_scalar_den_2(double addrspace(1)* %out, double addrspace(1)* %in, double %b) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep = getelementptr double, double addrspace(1)* %in, i32 %tid
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%a = load double, double addrspace(1)* %gep, align 8
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%result = call { double, i1 } @llvm.amdgcn.div.scale.f64(double %a, double %b, i1 true) nounwind readnone
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%result0 = extractvalue { double, i1 } %result, 0
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store double %result0, double addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: {{^}}test_div_scale_f32_all_scalar_1:
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; SI-DAG: s_load_dword [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
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; SI-DAG: s_load_dword [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xc
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; SI: v_mov_b32_e32 [[VA:v[0-9]+]], [[A]]
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; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[VA]]
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; SI: buffer_store_dword [[RESULT0]]
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; SI: s_endpgm
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define void @test_div_scale_f32_all_scalar_1(float addrspace(1)* %out, float %a, float %b) nounwind {
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%result = call { float, i1 } @llvm.amdgcn.div.scale.f32(float %a, float %b, i1 false) nounwind readnone
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%result0 = extractvalue { float, i1 } %result, 0
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store float %result0, float addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: {{^}}test_div_scale_f32_all_scalar_2:
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; SI-DAG: s_load_dword [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
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; SI-DAG: s_load_dword [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xc
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; SI: v_mov_b32_e32 [[VB:v[0-9]+]], [[B]]
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; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[VB]], [[A]]
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; SI: buffer_store_dword [[RESULT0]]
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; SI: s_endpgm
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define void @test_div_scale_f32_all_scalar_2(float addrspace(1)* %out, float %a, float %b) nounwind {
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%result = call { float, i1 } @llvm.amdgcn.div.scale.f32(float %a, float %b, i1 true) nounwind readnone
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%result0 = extractvalue { float, i1 } %result, 0
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store float %result0, float addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: {{^}}test_div_scale_f64_all_scalar_1:
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; SI-DAG: s_load_dwordx2 s{{\[}}[[A_LO:[0-9]+]]:[[A_HI:[0-9]+]]{{\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0xb
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; SI-DAG: s_load_dwordx2 [[B:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xd
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; SI-DAG: v_mov_b32_e32 v[[VA_LO:[0-9]+]], s[[A_LO]]
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; SI-DAG: v_mov_b32_e32 v[[VA_HI:[0-9]+]], s[[A_HI]]
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; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], v{{\[}}[[VA_LO]]:[[VA_HI]]{{\]}}
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; SI: buffer_store_dwordx2 [[RESULT0]]
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; SI: s_endpgm
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define void @test_div_scale_f64_all_scalar_1(double addrspace(1)* %out, double %a, double %b) nounwind {
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%result = call { double, i1 } @llvm.amdgcn.div.scale.f64(double %a, double %b, i1 false) nounwind readnone
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%result0 = extractvalue { double, i1 } %result, 0
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store double %result0, double addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: {{^}}test_div_scale_f64_all_scalar_2:
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; SI-DAG: s_load_dwordx2 [[A:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
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; SI-DAG: s_load_dwordx2 s{{\[}}[[B_LO:[0-9]+]]:[[B_HI:[0-9]+]]{{\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0xd
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; SI-DAG: v_mov_b32_e32 v[[VB_LO:[0-9]+]], s[[B_LO]]
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; SI-DAG: v_mov_b32_e32 v[[VB_HI:[0-9]+]], s[[B_HI]]
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; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], v{{\[}}[[VB_LO]]:[[VB_HI]]{{\]}}, [[A]]
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; SI: buffer_store_dwordx2 [[RESULT0]]
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; SI: s_endpgm
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define void @test_div_scale_f64_all_scalar_2(double addrspace(1)* %out, double %a, double %b) nounwind {
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%result = call { double, i1 } @llvm.amdgcn.div.scale.f64(double %a, double %b, i1 true) nounwind readnone
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%result0 = extractvalue { double, i1 } %result, 0
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store double %result0, double addrspace(1)* %out, align 8
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ret void
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}
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|
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; SI-LABEL: {{^}}test_div_scale_f32_inline_imm_num:
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; SI-DAG: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
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; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[A]], 1.0
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; SI: buffer_store_dword [[RESULT0]]
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|
; SI: s_endpgm
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|
define void @test_div_scale_f32_inline_imm_num(float addrspace(1)* %out, float addrspace(1)* %in) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep.0 = getelementptr float, float addrspace(1)* %in, i32 %tid
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%a = load float, float addrspace(1)* %gep.0, align 4
|
|
|
|
%result = call { float, i1 } @llvm.amdgcn.div.scale.f32(float 1.0, float %a, i1 false) nounwind readnone
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|
%result0 = extractvalue { float, i1 } %result, 0
|
|
store float %result0, float addrspace(1)* %out, align 4
|
|
ret void
|
|
}
|
|
|
|
; SI-LABEL: {{^}}test_div_scale_f32_inline_imm_den:
|
|
; SI-DAG: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
|
|
; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], 2.0, 2.0, [[A]]
|
|
; SI: buffer_store_dword [[RESULT0]]
|
|
; SI: s_endpgm
|
|
define void @test_div_scale_f32_inline_imm_den(float addrspace(1)* %out, float addrspace(1)* %in) nounwind {
|
|
%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
|
|
%gep.0 = getelementptr float, float addrspace(1)* %in, i32 %tid
|
|
%a = load float, float addrspace(1)* %gep.0, align 4
|
|
|
|
%result = call { float, i1 } @llvm.amdgcn.div.scale.f32(float %a, float 2.0, i1 false) nounwind readnone
|
|
%result0 = extractvalue { float, i1 } %result, 0
|
|
store float %result0, float addrspace(1)* %out, align 4
|
|
ret void
|
|
}
|
|
|
|
; SI-LABEL: {{^}}test_div_scale_f32_fabs_num:
|
|
; SI-DAG: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64
|
|
; SI-DAG: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
|
|
; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], |[[A]]|
|
|
; SI: buffer_store_dword [[RESULT0]]
|
|
; SI: s_endpgm
|
|
define void @test_div_scale_f32_fabs_num(float addrspace(1)* %out, float addrspace(1)* %in) nounwind {
|
|
%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
|
|
%gep.0 = getelementptr float, float addrspace(1)* %in, i32 %tid
|
|
%gep.1 = getelementptr float, float addrspace(1)* %gep.0, i32 1
|
|
|
|
%a = load volatile float, float addrspace(1)* %gep.0, align 4
|
|
%b = load volatile float, float addrspace(1)* %gep.1, align 4
|
|
|
|
%a.fabs = call float @llvm.fabs.f32(float %a) nounwind readnone
|
|
|
|
%result = call { float, i1 } @llvm.amdgcn.div.scale.f32(float %a.fabs, float %b, i1 false) nounwind readnone
|
|
%result0 = extractvalue { float, i1 } %result, 0
|
|
store float %result0, float addrspace(1)* %out, align 4
|
|
ret void
|
|
}
|
|
|
|
; SI-LABEL: {{^}}test_div_scale_f32_fabs_den:
|
|
; SI-DAG: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64
|
|
; SI-DAG: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
|
|
; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], |[[B]]|, |[[B]]|, [[A]]
|
|
; SI: buffer_store_dword [[RESULT0]]
|
|
; SI: s_endpgm
|
|
define void @test_div_scale_f32_fabs_den(float addrspace(1)* %out, float addrspace(1)* %in) nounwind {
|
|
%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
|
|
%gep.0 = getelementptr float, float addrspace(1)* %in, i32 %tid
|
|
%gep.1 = getelementptr float, float addrspace(1)* %gep.0, i32 1
|
|
|
|
%a = load volatile float, float addrspace(1)* %gep.0, align 4
|
|
%b = load volatile float, float addrspace(1)* %gep.1, align 4
|
|
|
|
%b.fabs = call float @llvm.fabs.f32(float %b) nounwind readnone
|
|
|
|
%result = call { float, i1 } @llvm.amdgcn.div.scale.f32(float %a, float %b.fabs, i1 false) nounwind readnone
|
|
%result0 = extractvalue { float, i1 } %result, 0
|
|
store float %result0, float addrspace(1)* %out, align 4
|
|
ret void
|
|
}
|