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https://github.com/RPCS3/llvm-mirror.git
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3a9a1ac61b
For some reason there are both of these available, except for scalar 64-bit compares which only has u64. I'm not sure why there are both (I'm guessing it's for the one bit inputs we don't use), but for consistency always using the unsigned one. llvm-svn: 282832
412 lines
11 KiB
LLVM
412 lines
11 KiB
LLVM
; RUN: llc < %s -march=amdgcn -verify-machineinstrs | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600 --check-prefix=FUNC %s
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declare i32 @llvm.r600.read.tidig.x() nounwind readnone
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; FUNC-LABEL: {{^}}setcc_v2i32:
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[3].X, KC0[3].Z
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[2].W, KC0[3].Y
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define void @setcc_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a, <2 x i32> %b) {
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%result = icmp eq <2 x i32> %a, %b
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%sext = sext <2 x i1> %result to <2 x i32>
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store <2 x i32> %sext, <2 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}setcc_v4i32:
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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define void @setcc_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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%b_ptr = getelementptr <4 x i32>, <4 x i32> addrspace(1)* %in, i32 1
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%a = load <4 x i32>, <4 x i32> addrspace(1) * %in
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%b = load <4 x i32>, <4 x i32> addrspace(1) * %b_ptr
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%result = icmp eq <4 x i32> %a, %b
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%sext = sext <4 x i1> %result to <4 x i32>
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store <4 x i32> %sext, <4 x i32> addrspace(1)* %out
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ret void
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}
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;;;==========================================================================;;;
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;; Float comparisons
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;;;==========================================================================;;;
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; FUNC-LABEL: {{^}}f32_oeq:
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; R600: SETE_DX10
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; SI: v_cmp_eq_f32
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define void @f32_oeq(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp oeq float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_ogt:
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; R600: SETGT_DX10
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; SI: v_cmp_gt_f32
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define void @f32_ogt(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ogt float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_oge:
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; R600: SETGE_DX10
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; SI: v_cmp_ge_f32
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define void @f32_oge(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp oge float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_olt:
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; R600: SETGT_DX10
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; SI: v_cmp_lt_f32
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define void @f32_olt(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp olt float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_ole:
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; R600: SETGE_DX10
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; SI: v_cmp_le_f32
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define void @f32_ole(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ole float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_one:
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; R600-DAG: SETE_DX10
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; R600-DAG: SETE_DX10
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; R600-DAG: AND_INT
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; R600-DAG: SETNE_DX10
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; R600-DAG: AND_INT
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; R600-DAG: SETNE_INT
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; SI: v_cmp_lg_f32_e32 vcc
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; SI-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
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define void @f32_one(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp one float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_ord:
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; R600-DAG: SETE_DX10
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; R600-DAG: SETE_DX10
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; R600-DAG: AND_INT
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; R600-DAG: SETNE_INT
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; SI: v_cmp_o_f32
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define void @f32_ord(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ord float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_ueq:
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; R600-DAG: SETNE_DX10
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; R600-DAG: SETNE_DX10
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; R600-DAG: OR_INT
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; R600-DAG: SETE_DX10
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; R600-DAG: OR_INT
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; R600-DAG: SETNE_INT
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; SI: v_cmp_nlg_f32_e32 vcc
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; SI-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
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define void @f32_ueq(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ueq float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_ugt:
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; R600: SETGE
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; R600: SETE_DX10
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; SI: v_cmp_nle_f32_e32 vcc
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; SI-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
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define void @f32_ugt(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ugt float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_uge:
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; R600: SETGT
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; R600: SETE_DX10
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; SI: v_cmp_nlt_f32_e32 vcc
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; SI-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
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define void @f32_uge(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp uge float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_ult:
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; R600: SETGE
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; R600: SETE_DX10
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; SI: v_cmp_nge_f32_e32 vcc
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; SI-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
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define void @f32_ult(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ult float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_ule:
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; R600: SETGT
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; R600: SETE_DX10
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; SI: v_cmp_ngt_f32_e32 vcc
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; SI-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
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define void @f32_ule(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ule float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_une:
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; R600: SETNE_DX10
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; SI: v_cmp_neq_f32
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define void @f32_une(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp une float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_uno:
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; R600: SETNE_DX10
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; R600: SETNE_DX10
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; R600: OR_INT
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; R600: SETNE_INT
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; SI: v_cmp_u_f32
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define void @f32_uno(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp uno float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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;;;==========================================================================;;;
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;; 32-bit integer comparisons
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;;;==========================================================================;;;
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; FUNC-LABEL: {{^}}i32_eq:
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; R600: SETE_INT
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; SI: v_cmp_eq_u32
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define void @i32_eq(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp eq i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_ne:
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; R600: SETNE_INT
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; SI: v_cmp_ne_u32
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define void @i32_ne(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp ne i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_ugt:
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; R600: SETGT_UINT
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; SI: v_cmp_gt_u32
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define void @i32_ugt(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp ugt i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_uge:
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; R600: SETGE_UINT
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; SI: v_cmp_ge_u32
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define void @i32_uge(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp uge i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_ult:
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; R600: SETGT_UINT
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; SI: v_cmp_lt_u32
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define void @i32_ult(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp ult i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_ule:
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; R600: SETGE_UINT
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; SI: v_cmp_le_u32
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define void @i32_ule(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp ule i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_sgt:
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; R600: SETGT_INT
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; SI: v_cmp_gt_i32
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define void @i32_sgt(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp sgt i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_sge:
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; R600: SETGE_INT
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; SI: v_cmp_ge_i32
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define void @i32_sge(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp sge i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_slt:
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; R600: SETGT_INT
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; SI: v_cmp_lt_i32
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define void @i32_slt(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp slt i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_sle:
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; R600: SETGE_INT
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; SI: v_cmp_le_i32
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define void @i32_sle(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp sle i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FIXME: This does 4 compares
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; FUNC-LABEL: {{^}}v3i32_eq:
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; SI-DAG: v_cmp_eq_u32
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; SI-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1,
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; SI-DAG: v_cmp_eq_u32
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; SI-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1,
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; SI-DAG: v_cmp_eq_u32
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; SI-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1,
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; SI: s_endpgm
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define void @v3i32_eq(<3 x i32> addrspace(1)* %out, <3 x i32> addrspace(1)* %ptra, <3 x i32> addrspace(1)* %ptrb) {
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%tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone
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%gep.a = getelementptr <3 x i32>, <3 x i32> addrspace(1)* %ptra, i32 %tid
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%gep.b = getelementptr <3 x i32>, <3 x i32> addrspace(1)* %ptrb, i32 %tid
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%gep.out = getelementptr <3 x i32>, <3 x i32> addrspace(1)* %out, i32 %tid
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%a = load <3 x i32>, <3 x i32> addrspace(1)* %gep.a
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%b = load <3 x i32>, <3 x i32> addrspace(1)* %gep.b
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%cmp = icmp eq <3 x i32> %a, %b
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%ext = sext <3 x i1> %cmp to <3 x i32>
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store <3 x i32> %ext, <3 x i32> addrspace(1)* %gep.out
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ret void
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}
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; FUNC-LABEL: {{^}}v3i8_eq:
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; SI-DAG: v_cmp_eq_u32
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; SI-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1,
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; SI-DAG: v_cmp_eq_u32
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; SI-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1,
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; SI-DAG: v_cmp_eq_u32
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; SI-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1,
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; SI: s_endpgm
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define void @v3i8_eq(<3 x i8> addrspace(1)* %out, <3 x i8> addrspace(1)* %ptra, <3 x i8> addrspace(1)* %ptrb) {
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%tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone
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%gep.a = getelementptr <3 x i8>, <3 x i8> addrspace(1)* %ptra, i32 %tid
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%gep.b = getelementptr <3 x i8>, <3 x i8> addrspace(1)* %ptrb, i32 %tid
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%gep.out = getelementptr <3 x i8>, <3 x i8> addrspace(1)* %out, i32 %tid
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%a = load <3 x i8>, <3 x i8> addrspace(1)* %gep.a
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%b = load <3 x i8>, <3 x i8> addrspace(1)* %gep.b
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%cmp = icmp eq <3 x i8> %a, %b
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%ext = sext <3 x i1> %cmp to <3 x i8>
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store <3 x i8> %ext, <3 x i8> addrspace(1)* %gep.out
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ret void
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}
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; Make sure we don't try to emit i1 setcc ops
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; FUNC-LABEL: setcc-i1
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; SI: s_and_b32 [[AND:s[0-9]+]], s{{[0-9]+}}, 1
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; SI: s_cmp_eq_u32 [[AND]], 0
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define void @setcc-i1(i32 %in) {
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%and = and i32 %in, 1
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%cmp = icmp eq i32 %and, 0
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br i1 %cmp, label %endif, label %if
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if:
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unreachable
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endif:
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ret void
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}
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; FUNC-LABEL: setcc-i1-and-xor
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; SI-DAG: v_cmp_ge_f32_e64 [[A:s\[[0-9]+:[0-9]+\]]], s{{[0-9]+}}, 0{{$}}
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; SI-DAG: v_cmp_le_f32_e64 [[B:s\[[0-9]+:[0-9]+\]]], s{{[0-9]+}}, 1.0
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; SI: s_and_b64 s[2:3], [[A]], [[B]]
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define void @setcc-i1-and-xor(i32 addrspace(1)* %out, float %cond) #0 {
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bb0:
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%tmp5 = fcmp oge float %cond, 0.000000e+00
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%tmp7 = fcmp ole float %cond, 1.000000e+00
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%tmp9 = and i1 %tmp5, %tmp7
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%tmp11 = xor i1 %tmp9, 1
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br i1 %tmp11, label %bb2, label %bb1
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bb1:
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store i32 0, i32 addrspace(1)* %out
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br label %bb2
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bb2:
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ret void
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}
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