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AsmParser
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[AArch64][AsmParser] NFC: Parser.getTok().getLoc() -> getLoc()
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2021-07-26 09:36:34 +00:00 |
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Disassembler
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[AArch64][SME] Add mova instructions
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2021-07-21 08:20:01 +00:00 |
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GISel
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AArch64: support i128 (& larger) returns in GlobalISel
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2021-07-26 14:16:35 +01:00 |
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MCTargetDesc
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[AArch64][SME] Add system registers and related instructions
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2021-07-20 08:06:26 +00:00 |
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TargetInfo
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Utils
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[AArch64][SME] Add system registers and related instructions
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2021-07-20 08:06:26 +00:00 |
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AArch64.h
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[AArch64][GlobalISel] Create a new minimal combiner pass just for -O0.
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2021-05-07 17:01:27 -07:00 |
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AArch64.td
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[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
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2021-07-12 13:28:10 +00:00 |
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AArch64A53Fix835769.cpp
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AArch64A57FPLoadBalancing.cpp
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AArch64AdvSIMDScalarPass.cpp
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AArch64AsmPrinter.cpp
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[AArch64] De-capitalize some Emit* functions
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2021-07-11 22:05:39 -07:00 |
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AArch64BranchTargets.cpp
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AArch64CallingConvention.cpp
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AArch64CallingConvention.h
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AArch64CallingConvention.td
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IR/AArch64/X86: add "swifttailcc" calling convention.
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2021-05-17 10:48:34 +01:00 |
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AArch64CleanupLocalDynamicTLSPass.cpp
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AArch64CollectLOH.cpp
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AArch64Combine.td
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[GlobalISel] Add combine for merge(unmerge) and use AArch64 postlegal-combiner.
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2021-07-26 10:37:31 -07:00 |
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AArch64CompressJumpTables.cpp
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AArch64CondBrTuning.cpp
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AArch64ConditionalCompares.cpp
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AArch64ConditionOptimizer.cpp
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AArch64DeadRegisterDefinitionsPass.cpp
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AArch64ExpandImm.cpp
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AArch64ExpandImm.h
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AArch64ExpandPseudoInsts.cpp
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[AArch64][SVE] Break false dependencies for inactive lanes of unary operations
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2021-07-26 15:01:21 +00:00 |
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AArch64FalkorHWPFFix.cpp
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AArch64FastISel.cpp
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[AArch64] Optimize overflow checks for [s|u]mul.with.overflow.i32.
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2021-07-12 15:30:42 -07:00 |
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AArch64FrameLowering.cpp
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[AArch64] Fix Local Deallocation for Homogeneous Prolog/Epilog
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2021-07-25 10:51:11 -07:00 |
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AArch64FrameLowering.h
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[NFC] Fix a few whitespace issues and typos.
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2021-07-04 11:49:58 +01:00 |
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AArch64GenRegisterBankInfo.def
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AArch64: support i128 cmpxchg in GlobalISel.
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2021-05-14 10:41:38 +01:00 |
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AArch64InstrAtomics.td
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[AArch64] Fix i128 cmpxchg using ldxp/stxp.
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2021-07-20 12:38:12 -07:00 |
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AArch64InstrFormats.td
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[AArch64][SVE] Break false dependencies for inactive lanes of unary operations
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2021-07-26 15:01:21 +00:00 |
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AArch64InstrGISel.td
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AArch64: support i128 cmpxchg in GlobalISel.
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2021-05-14 10:41:38 +01:00 |
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AArch64InstrInfo.cpp
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[AArch64] Dump a little more info about unimplemented reg-to-reg copies. NFC
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2021-07-12 15:37:11 -07:00 |
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AArch64InstrInfo.h
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[AArch64][SVE] Break false dependencies for inactive lanes of unary operations
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2021-07-26 15:01:21 +00:00 |
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AArch64InstrInfo.td
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[AArch64][SME] Add matrix register definitions and parsing support
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2021-07-14 08:25:49 +00:00 |
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AArch64ISelDAGToDAG.cpp
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[SVE] Use reg+reg addressing mode for immediate offsets.
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2021-07-26 16:24:16 +01:00 |
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AArch64ISelLowering.cpp
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[SVE][AArch64] Improve code generation for vector_splice for Imm > 0
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2021-07-26 11:45:46 +01:00 |
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AArch64ISelLowering.h
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[AArch64][SVE] Improve code generation for vector_splice for Imm == -1
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2021-07-26 11:25:01 +01:00 |
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AArch64LoadStoreOptimizer.cpp
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Revert "[AArch64LoadStoreOptimizer] Recommit: Generate more STPs by renaming registers earlier"
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2021-06-23 09:54:16 +03:00 |
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AArch64LowerHomogeneousPrologEpilog.cpp
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[CodeGen] Add missing includes (NFC)
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2021-06-06 15:48:27 +02:00 |
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AArch64MachineFunctionInfo.cpp
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[llvm] Rename StringRef _lower() method calls to _insensitive()
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2021-06-25 00:22:01 +03:00 |
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AArch64MachineFunctionInfo.h
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IR/AArch64/X86: add "swifttailcc" calling convention.
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2021-05-17 10:48:34 +01:00 |
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AArch64MacroFusion.cpp
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AArch64MacroFusion.h
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AArch64MCInstLower.cpp
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AArch64MCInstLower.h
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AArch64PBQPRegAlloc.cpp
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[NFCI] Move DEBUG_TYPE definition below #includes
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2021-05-30 17:31:01 +08:00 |
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AArch64PBQPRegAlloc.h
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AArch64PerfectShuffle.h
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AArch64PfmCounters.td
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AArch64PromoteConstant.cpp
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AArch64RedundantCopyElimination.cpp
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AArch64RegisterBanks.td
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AArch64: support i128 cmpxchg in GlobalISel.
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2021-05-14 10:41:38 +01:00 |
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AArch64RegisterInfo.cpp
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[AArch64][SME] Add load and store instructions
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2021-07-16 10:11:10 +00:00 |
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AArch64RegisterInfo.h
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AArch64RegisterInfo.td
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[AArch64][SME] Improve diagnostic for vector select register
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2021-07-22 13:46:40 +00:00 |
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AArch64SchedA53.td
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[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
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2021-07-12 13:28:10 +00:00 |
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AArch64SchedA55.td
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[AArch64] Update Cortex-A55 SchedModel to improve LDP scheduling
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2021-07-16 12:00:57 +01:00 |
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AArch64SchedA57.td
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[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
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2021-07-12 13:28:10 +00:00 |
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AArch64SchedA57WriteRes.td
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AArch64SchedA64FX.td
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AArch64SchedCyclone.td
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[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
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2021-07-12 13:28:10 +00:00 |
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AArch64SchedExynosM3.td
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[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
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2021-07-12 13:28:10 +00:00 |
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AArch64SchedExynosM4.td
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[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
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2021-07-12 13:28:10 +00:00 |
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AArch64SchedExynosM5.td
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[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
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2021-07-12 13:28:10 +00:00 |
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AArch64SchedFalkor.td
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[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
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2021-07-12 13:28:10 +00:00 |
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AArch64SchedFalkorDetails.td
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AArch64SchedKryo.td
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[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
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2021-07-12 13:28:10 +00:00 |
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AArch64SchedKryoDetails.td
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AArch64SchedPredExynos.td
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AArch64SchedPredicates.td
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AArch64SchedThunderX2T99.td
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[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
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2021-07-12 13:28:10 +00:00 |
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AArch64SchedThunderX3T110.td
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AArch64SchedThunderX.td
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[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
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2021-07-12 13:28:10 +00:00 |
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AArch64SchedTSV110.td
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AArch64Schedule.td
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AArch64SelectionDAGInfo.cpp
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AArch64SelectionDAGInfo.h
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AArch64SIMDInstrOpt.cpp
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AArch64SLSHardening.cpp
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[ARM][AArch64] SLSHardening: make non-comdat thunks possible
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2021-05-20 17:07:05 +02:00 |
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AArch64SMEInstrInfo.td
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[AArch64][SME] Add mova instructions
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2021-07-21 08:20:01 +00:00 |
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AArch64SpeculationHardening.cpp
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AArch64StackTagging.cpp
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[NFC][asan] Always pass Dominator Trees into forAllReachableExits
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2021-07-22 18:01:38 -07:00 |
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AArch64StackTaggingPreRA.cpp
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AArch64StorePairSuppress.cpp
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AArch64Subtarget.cpp
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[AArch64][SVE] Wire up vscale_range attribute to SVE min/max vector queries
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2021-06-21 13:00:36 +01:00 |
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AArch64Subtarget.h
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[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
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2021-07-12 13:28:10 +00:00 |
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AArch64SVEInstrInfo.td
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[AArch64][SVE] Break false dependencies for inactive lanes of unary operations
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2021-07-26 15:01:21 +00:00 |
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AArch64SystemOperands.td
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[AArch64][SME] Add system registers and related instructions
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2021-07-20 08:06:26 +00:00 |
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AArch64TargetMachine.cpp
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Fix typo in help text for -aarch64-enable-branch-targets.
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2021-07-05 16:15:40 +01:00 |
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AArch64TargetMachine.h
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AArch64TargetObjectFile.cpp
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AArch64TargetObjectFile.h
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AArch64TargetTransformInfo.cpp
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[Analysis] Add simple cost model for strict (in-order) reductions
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2021-07-26 10:26:06 +01:00 |
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AArch64TargetTransformInfo.h
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[Analysis] Add simple cost model for strict (in-order) reductions
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2021-07-26 10:26:06 +01:00 |
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CMakeLists.txt
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[AArch64][GlobalISel] Create a new minimal combiner pass just for -O0.
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2021-05-07 17:01:27 -07:00 |
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SMEInstrFormats.td
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[AArch64][SME] Add mova instructions
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2021-07-21 08:20:01 +00:00 |
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SVEInstrFormats.td
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[AArch64][SVE] Break false dependencies for inactive lanes of unary operations
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2021-07-26 15:01:21 +00:00 |
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SVEIntrinsicOpts.cpp
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[AArch64][SVE] Move instcombine like transforms out of SVEIntrinsicOpts
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2021-07-20 14:17:30 +00:00 |
