mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2025-02-01 13:11:39 +01:00
c5dcb602f8
Move store merge to happen after intrinsic lowering to allow lowered stores to be merged. Some regressions due in MergeConsecutiveStores to missing insert_subvector that are addressed in follow up patch. Reviewers: craig.topper, efriedma, RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34559 llvm-svn: 310710
18 lines
782 B
LLVM
18 lines
782 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
|
; REQUIRES: asserts
|
|
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s
|
|
|
|
define <16 x i8> @PR27973() {
|
|
; CHECK-LABEL: PR27973:
|
|
; CHECK: # BB#0:
|
|
; CHECK-NEXT: movq $0, 8(%rdi)
|
|
; CHECK-NEXT: movq $0, (%rdi)
|
|
; CHECK-NEXT: movq %rdi, %rax
|
|
; CHECK-NEXT: retq
|
|
%t0 = zext <16 x i8> zeroinitializer to <16 x i32>
|
|
%t1 = add nuw nsw <16 x i32> %t0, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
|
|
%t2 = lshr <16 x i32> %t1, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
|
|
%t3 = trunc <16 x i32> %t2 to <16 x i8>
|
|
ret <16 x i8> %t3
|
|
}
|