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4b4c372886
This patch defines the i1 type as illegal in the X86 backend for AVX512. For DAG operations on <N x i1> types (build vector, extract vector element, ...) i8 is used, and should be truncated/extended. This should produce better scalar code for i1 types since GPRs will be used instead of mask registers. Differential Revision: https://reviews.llvm.org/D32273 llvm-svn: 303421
95 lines
1.8 KiB
LLVM
95 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=KNL
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; RUN: llc < %s -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define i64 @foo64(i1 zeroext %i) #0 {
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; CHECK-LABEL: foo64:
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; CHECK: # BB#0:
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: orq $-2, %rax
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; CHECK-NEXT: retq
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br label %bb
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bb:
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%z = zext i1 %i to i64
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%v = or i64 %z, -2
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br label %end
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end:
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ret i64 %v
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}
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define i16 @foo16(i1 zeroext %i) #0 {
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; CHECK-LABEL: foo16:
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; CHECK: # BB#0:
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: orl $65534, %eax # imm = 0xFFFE
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; CHECK-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
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; CHECK-NEXT: retq
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br label %bb
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bb:
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%z = zext i1 %i to i16
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%v = or i16 %z, -2
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br label %end
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end:
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ret i16 %v
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}
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define i16 @foo16_1(i1 zeroext %i, i32 %j) #0 {
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; CHECK-LABEL: foo16_1:
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; CHECK: # BB#0:
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: orl $2, %eax
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; CHECK-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
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; CHECK-NEXT: retq
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br label %bb
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bb:
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%z = zext i1 %i to i16
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%v = or i16 %z, 2
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br label %end
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end:
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ret i16 %v
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}
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define i32 @foo32(i1 zeroext %i) #0 {
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; CHECK-LABEL: foo32:
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; CHECK: # BB#0:
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: orl $-2, %eax
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; CHECK-NEXT: retq
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br label %bb
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bb:
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%z = zext i1 %i to i32
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%v = or i32 %z, -2
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br label %end
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end:
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ret i32 %v
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}
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define i8 @foo8(i1 zeroext %i) #0 {
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; CHECK-LABEL: foo8:
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; CHECK: # BB#0:
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; CHECK-NEXT: orb $-2, %dil
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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br label %bb
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bb:
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%z = zext i1 %i to i8
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%v = or i8 %z, -2
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br label %end
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end:
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ret i8 %v
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}
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