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llvm-mirror/include/llvm
Simon Cook bae1c75f0d [TableGen] Support combining AssemblerPredicates with ORs
For context, the proposed RISC-V bit manipulation extension has a subset
of instructions which require one of two SubtargetFeatures to be
enabled, 'zbb' or 'zbp', and there is no defined feature which both of
these can imply to use as a constraint either (see comments in D65649).

AssemblerPredicates allow multiple SubtargetFeatures to be declared in
the "AssemblerCondString" field, separated by commas, and this means
that the two features must both be enabled. There is no equivalent to
say that _either_ feature X or feature Y must be enabled, short of
creating a dummy SubtargetFeature for this purpose and having features X
and Y imply the new feature.

To solve the case where X or Y is needed without adding a new feature,
and to better match a typical TableGen style, this replaces the existing
"AssemblerCondString" with a dag "AssemblerCondDag" which represents the
same information. Two operators are defined for use with
AssemblerCondDag, "all_of", which matches the current behaviour, and
"any_of", which adds the new proposed ORing features functionality.

This was originally proposed in the RFC at
http://lists.llvm.org/pipermail/llvm-dev/2020-February/139138.html

Changes to all current backends are mechanical to support the replaced
functionality, and are NFCI.

At this stage, it is illegal to combine features with ands and ors in a
single AssemblerCondDag. I suspect this case is sufficiently rare that
adding more complex changes to support it are unnecessary.

Differential Revision: https://reviews.llvm.org/D74338
2020-03-13 17:13:51 +00:00
..
ADT [NFC] Add filters to hasNItems and hasNItemsOrMore 2020-03-12 10:10:21 +01:00
Analysis [Attributor] Detect possibly unbounded cycles in functions 2020-03-13 11:17:33 -05:00
AsmParser
BinaryFormat Add debug info support for Swift/Clang APINotes. 2020-03-11 18:47:30 -07:00
Bitcode
Bitstream Avoid including FileSystem.h from MemoryBuffer.h 2020-02-29 12:30:23 -08:00
CodeGen CodeGen: Add constexpr to Register constructors 2020-03-12 19:10:59 -04:00
Config Revert abb00753 "build: reduce CMake handling for zlib" (PR44780) 2020-03-03 11:03:09 +01:00
DebugInfo [CodeView] Align type records on 4-bytes when emitting PDBs 2020-03-13 12:22:19 -04:00
Demangle
DWARFLinker [DWARFLinker][NFC] Remove usages of "const object::ObjectFile" from DWARFLinker. 2020-02-28 13:26:22 +03:00
ExecutionEngine [ORC] Add a mutex to guard EHFrameRegistrationPlugin data structures. 2020-03-12 15:33:56 -07:00
Frontend/OpenMP Revert "[OpenMP] Adding InaccessibleMemOnly and InaccessibleMemOrArgMemOnly for runtime calls." 2020-03-03 20:42:05 +01:00
FuzzMutate
IR [AArch64][SVE] Add the @llvm.aarch64.sve.dup.x intrinsic 2020-03-13 12:40:22 +00:00
IRReader
LineEditor
Linker
LTO [LTO][Legacy] Add new API to query Mach-O CPU (sub)type 2020-02-28 12:56:05 -08:00
MC [TableGen] Support combining AssemblerPredicates with ORs 2020-03-13 17:13:51 +00:00
MCA
Object [ARM] Rewrite ARMAttributeParser 2020-03-05 10:57:27 -08:00
ObjectYAML
Option
Passes
ProfileData [Coverage] Collect all function records in an object (D69471 followup) 2020-03-02 12:01:09 -08:00
Remarks
Support [Clang][Driver] In -fintegrated-cc1 mode, avoid crashing on exit after a compiler crash 2020-03-13 08:15:35 -04:00
TableGen
Target [TableGen] Support combining AssemblerPredicates with ORs 2020-03-13 17:13:51 +00:00
Testing/Support
TextAPI [TextAPI] Teach TextAPI about arm64e 2020-03-05 13:22:25 -08:00
ToolDrivers
Transforms [Attributor] IPO across definition boundary of a function marked alwaysinline 2020-03-13 01:06:12 -05:00
WindowsManifest
WindowsResource
XRay
CMakeLists.txt
InitializePasses.h
LinkAllIR.h
LinkAllPasses.h
module.extern.modulemap
module.install.modulemap
module.modulemap Fixed [AssumeBundles] Move to IR so it can be used by Analysis 2020-03-10 18:02:39 +01:00
module.modulemap.build
Pass.h
PassAnalysisSupport.h
PassInfo.h
PassRegistry.h
PassSupport.h