mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-23 21:13:02 +02:00
b2d6052871
type erased interface and a single analysis pass rather than an extremely complex analysis group. The end result is that the TTI analysis can contain a type erased implementation that supports the polymorphic TTI interface. We can build one from a target-specific implementation or from a dummy one in the IR. I've also factored all of the code into "mix-in"-able base classes, including CRTP base classes to facilitate calling back up to the most specialized form when delegating horizontally across the surface. These aren't as clean as I would like and I'm planning to work on cleaning some of this up, but I wanted to start by putting into the right form. There are a number of reasons for this change, and this particular design. The first and foremost reason is that an analysis group is complete overkill, and the chaining delegation strategy was so opaque, confusing, and high overhead that TTI was suffering greatly for it. Several of the TTI functions had failed to be implemented in all places because of the chaining-based delegation making there be no checking of this. A few other functions were implemented with incorrect delegation. The message to me was very clear working on this -- the delegation and analysis group structure was too confusing to be useful here. The other reason of course is that this is *much* more natural fit for the new pass manager. This will lay the ground work for a type-erased per-function info object that can look up the correct subtarget and even cache it. Yet another benefit is that this will significantly simplify the interaction of the pass managers and the TargetMachine. See the future work below. The downside of this change is that it is very, very verbose. I'm going to work to improve that, but it is somewhat an implementation necessity in C++ to do type erasure. =/ I discussed this design really extensively with Eric and Hal prior to going down this path, and afterward showed them the result. No one was really thrilled with it, but there doesn't seem to be a substantially better alternative. Using a base class and virtual method dispatch would make the code much shorter, but as discussed in the update to the programmer's manual and elsewhere, a polymorphic interface feels like the more principled approach even if this is perhaps the least compelling example of it. ;] Ultimately, there is still a lot more to be done here, but this was the huge chunk that I couldn't really split things out of because this was the interface change to TTI. I've tried to minimize all the other parts of this. The follow up work should include at least: 1) Improving the TargetMachine interface by having it directly return a TTI object. Because we have a non-pass object with value semantics and an internal type erasure mechanism, we can narrow the interface of the TargetMachine to *just* do what we need: build and return a TTI object that we can then insert into the pass pipeline. 2) Make the TTI object be fully specialized for a particular function. This will include splitting off a minimal form of it which is sufficient for the inliner and the old pass manager. 3) Add a new pass manager analysis which produces TTI objects from the target machine for each function. This may actually be done as part of #2 in order to use the new analysis to implement #2. 4) Work on narrowing the API between TTI and the targets so that it is easier to understand and less verbose to type erase. 5) Work on narrowing the API between TTI and its clients so that it is easier to understand and less verbose to forward. 6) Try to improve the CRTP-based delegation. I feel like this code is just a bit messy and exacerbating the complexity of implementing the TTI in each target. Many thanks to Eric and Hal for their help here. I ended up blocked on this somewhat more abruptly than I expected, and so I appreciate getting it sorted out very quickly. Differential Revision: http://reviews.llvm.org/D7293 llvm-svn: 227669 |
||
|---|---|---|
| .. | ||
| AsmParser | ||
| Disassembler | ||
| InstPrinter | ||
| MCTargetDesc | ||
| TargetInfo | ||
| Utils | ||
| AArch64.h | ||
| AArch64.td | ||
| AArch64A53Fix835769.cpp | ||
| AArch64A57FPLoadBalancing.cpp | ||
| AArch64AddressTypePromotion.cpp | ||
| AArch64AdvSIMDScalarPass.cpp | ||
| AArch64AsmPrinter.cpp | ||
| AArch64BranchRelaxation.cpp | ||
| AArch64CallingConvention.h | ||
| AArch64CallingConvention.td | ||
| AArch64CleanupLocalDynamicTLSPass.cpp | ||
| AArch64CollectLOH.cpp | ||
| AArch64ConditionalCompares.cpp | ||
| AArch64ConditionOptimizer.cpp | ||
| AArch64DeadRegisterDefinitionsPass.cpp | ||
| AArch64ExpandPseudoInsts.cpp | ||
| AArch64FastISel.cpp | ||
| AArch64FrameLowering.cpp | ||
| AArch64FrameLowering.h | ||
| AArch64InstrAtomics.td | ||
| AArch64InstrFormats.td | ||
| AArch64InstrInfo.cpp | ||
| AArch64InstrInfo.h | ||
| AArch64InstrInfo.td | ||
| AArch64ISelDAGToDAG.cpp | ||
| AArch64ISelLowering.cpp | ||
| AArch64ISelLowering.h | ||
| AArch64LoadStoreOptimizer.cpp | ||
| AArch64MachineCombinerPattern.h | ||
| AArch64MachineFunctionInfo.h | ||
| AArch64MCInstLower.cpp | ||
| AArch64MCInstLower.h | ||
| AArch64PBQPRegAlloc.cpp | ||
| AArch64PBQPRegAlloc.h | ||
| AArch64PerfectShuffle.h | ||
| AArch64PromoteConstant.cpp | ||
| AArch64RegisterInfo.cpp | ||
| AArch64RegisterInfo.h | ||
| AArch64RegisterInfo.td | ||
| AArch64SchedA53.td | ||
| AArch64SchedA57.td | ||
| AArch64SchedA57WriteRes.td | ||
| AArch64SchedCyclone.td | ||
| AArch64Schedule.td | ||
| AArch64SelectionDAGInfo.cpp | ||
| AArch64SelectionDAGInfo.h | ||
| AArch64StorePairSuppress.cpp | ||
| AArch64Subtarget.cpp | ||
| AArch64Subtarget.h | ||
| AArch64TargetMachine.cpp | ||
| AArch64TargetMachine.h | ||
| AArch64TargetObjectFile.cpp | ||
| AArch64TargetObjectFile.h | ||
| AArch64TargetTransformInfo.cpp | ||
| CMakeLists.txt | ||
| LLVMBuild.txt | ||
| Makefile | ||