mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-18 18:42:46 +02:00
b94c45d19b
The lowering for v2i64 is now guarded with hasDirectMove, however, the current lowering can handle the pattern correctly, only lowering it when there is efficient patterns and corresponding instructions. The original guard was added in D21135, and was for Legal action. The code has evloved now, this guard is not necessary anymore. Reviewed By: #powerpc, nemanjai Differential Revision: https://reviews.llvm.org/D105596
141 lines
8.9 KiB
LLVM
141 lines
8.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec -vec-extabi \
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; RUN: -stop-after=machine-cp -mtriple powerpc-ibm-aix-xcoff < %s | \
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; RUN: FileCheck %s --check-prefix=MIR32
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec -vec-extabi \
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; RUN: -stop-after=machine-cp -mtriple powerpc64-ibm-aix-xcoff < %s | \
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; RUN: FileCheck %s --check-prefix=MIR64
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%struct.Test = type { double, double, double, double }
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@__const.caller.t = private unnamed_addr constant %struct.Test { double 0.000000e+00, double 1.000000e+00, double 2.000000e+00, double 3.000000e+00 }, align 8
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define double @caller() {
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; MIR32-LABEL: name: caller
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; MIR32: bb.0.entry:
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; MIR32: renamable $r3 = LWZtoc @__const.caller.t, $r2 :: (load (s32) from got)
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; MIR32: renamable $r4 = LI 31
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; MIR32: renamable $v2 = LVX renamable $r3, killed renamable $r4
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; MIR32: renamable $r4 = LI 16
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; MIR32: renamable $v3 = LVX renamable $r3, killed renamable $r4
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; MIR32: renamable $v4 = LVSL $zero, renamable $r3
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; MIR32: renamable $v2 = VPERM renamable $v3, killed renamable $v2, renamable $v4
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; MIR32: renamable $r4 = LI 172
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; MIR32: STXVW4X killed renamable $v2, $r1, killed renamable $r4 :: (store (s128) into unknown-address + 16, align 4)
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; MIR32: renamable $v2 = LVX $zero, killed renamable $r3
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; MIR32: renamable $v2 = VPERM killed renamable $v2, killed renamable $v3, killed renamable $v4
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; MIR32: renamable $r3 = LI 156
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; MIR32: STXVW4X killed renamable $v2, $r1, killed renamable $r3 :: (store (s128), align 4)
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; MIR32: ADJCALLSTACKDOWN 188, 0, implicit-def dead $r1, implicit $r1
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; MIR32: renamable $vsl0 = XXLXORz
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; MIR32: $f1 = XXLXORdpz
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; MIR32: $f2 = XXLXORdpz
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; MIR32: $v2 = XXLXORz
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; MIR32: $v3 = XXLXORz
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; MIR32: $v4 = XXLXORz
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; MIR32: $v5 = XXLXORz
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; MIR32: $v6 = XXLXORz
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; MIR32: $v7 = XXLXORz
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; MIR32: $v8 = XXLXORz
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; MIR32: $v9 = XXLXORz
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; MIR32: $v10 = XXLXORz
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; MIR32: $v11 = XXLXORz
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; MIR32: $v12 = XXLXORz
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; MIR32: $v13 = XXLXORz
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; MIR32: $f3 = XXLXORdpz
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; MIR32: $f4 = XXLXORdpz
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; MIR32: $f5 = XXLXORdpz
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; MIR32: $f6 = XXLXORdpz
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; MIR32: $f7 = XXLXORdpz
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; MIR32: renamable $r3 = LI 136
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; MIR32: $f8 = XXLXORdpz
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; MIR32: renamable $r4 = LI 120
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; MIR32: renamable $r5 = LWZtoc %const.0, $r2 :: (load (s32) from got)
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; MIR32: STXVW4X renamable $vsl0, $r1, killed renamable $r3 :: (store (s128), align 8)
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; MIR32: $f9 = XXLXORdpz
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; MIR32: renamable $r3 = LI 104
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; MIR32: STXVW4X renamable $vsl0, $r1, killed renamable $r4 :: (store (s128), align 8)
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; MIR32: $f10 = XXLXORdpz
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; MIR32: STXVW4X renamable $vsl0, $r1, killed renamable $r3 :: (store (s128), align 8)
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; MIR32: renamable $r3 = LI 88
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; MIR32: $f11 = XXLXORdpz
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; MIR32: STXVW4X renamable $vsl0, $r1, killed renamable $r3 :: (store (s128), align 8)
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; MIR32: renamable $r3 = LI 72
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; MIR32: renamable $v0 = LXVD2X $zero, killed renamable $r5 :: (load (s128) from constant-pool)
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; MIR32: $f12 = XXLXORdpz
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; MIR32: STXVW4X killed renamable $vsl0, $r1, killed renamable $r3 :: (store (s128), align 8)
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; MIR32: $f13 = XXLXORdpz
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; MIR32: renamable $r5 = LI 48
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; MIR32: renamable $r6 = LI 512
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; MIR32: $r3 = LI 128
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; MIR32: $r4 = LI 256
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; MIR32: STXVD2X killed renamable $v0, $r1, killed renamable $r5 :: (store (s128))
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; MIR32: STW killed renamable $r6, 152, $r1 :: (store (s32))
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; MIR32: BL_NOP <mcsymbol .callee[PR]>, csr_aix32_altivec, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $f1, implicit $f2, implicit $v2, implicit $v3, implicit $v4, implicit $v5, implicit killed $v6, implicit killed $v7, implicit killed $v8, implicit killed $v9, implicit killed $v10, implicit killed $v11, implicit killed $v12, implicit killed $v13, implicit $f3, implicit $f4, implicit $f5, implicit $f6, implicit $f7, implicit $f8, implicit $f9, implicit $f10, implicit $f11, implicit $f12, implicit $f13, implicit $r2, implicit-def $r1, implicit-def $f1
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; MIR32: ADJCALLSTACKUP 188, 0, implicit-def dead $r1, implicit $r1
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; MIR32: BLR implicit $lr, implicit $rm, implicit $f1
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; MIR64-LABEL: name: caller
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; MIR64: bb.0.entry:
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; MIR64: renamable $x3 = LDtoc @__const.caller.t, $x2 :: (load (s64) from got)
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; MIR64: renamable $x4 = LI8 16
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; MIR64: renamable $vsl0 = LXVD2X renamable $x3, killed renamable $x4 :: (load (s128) from unknown-address + 16, align 8)
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; MIR64: renamable $x4 = LI8 208
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; MIR64: STXVD2X killed renamable $vsl0, $x1, killed renamable $x4 :: (store (s128) into unknown-address + 16, align 4)
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; MIR64: renamable $vsl0 = LXVD2X $zero8, killed renamable $x3 :: (load (s128), align 8)
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; MIR64: renamable $x3 = LI8 192
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; MIR64: STXVD2X killed renamable $vsl0, $x1, killed renamable $x3 :: (store (s128), align 4)
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; MIR64: ADJCALLSTACKDOWN 224, 0, implicit-def dead $r1, implicit $r1
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; MIR64: renamable $vsl0 = XXLXORz
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; MIR64: $f1 = XXLXORdpz
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; MIR64: $f2 = XXLXORdpz
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; MIR64: $v2 = XXLXORz
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; MIR64: $v3 = XXLXORz
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; MIR64: $v4 = XXLXORz
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; MIR64: $v5 = XXLXORz
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; MIR64: $v6 = XXLXORz
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; MIR64: $v7 = XXLXORz
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; MIR64: $v8 = XXLXORz
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; MIR64: $v9 = XXLXORz
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; MIR64: $v10 = XXLXORz
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; MIR64: $v11 = XXLXORz
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; MIR64: $v12 = XXLXORz
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; MIR64: $v13 = XXLXORz
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; MIR64: $f3 = XXLXORdpz
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; MIR64: $f4 = XXLXORdpz
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; MIR64: $f5 = XXLXORdpz
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; MIR64: $f6 = XXLXORdpz
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; MIR64: renamable $x3 = LDtocCPT %const.0, $x2 :: (load (s64) from got)
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; MIR64: $f7 = XXLXORdpz
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; MIR64: $f8 = XXLXORdpz
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; MIR64: renamable $x4 = LI8 160
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; MIR64: $f9 = XXLXORdpz
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; MIR64: renamable $x5 = LI8 144
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; MIR64: STXVW4X renamable $vsl0, $x1, killed renamable $x4 :: (store (s128), align 8)
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; MIR64: renamable $vsl13 = LXVD2X $zero8, killed renamable $x3 :: (load (s128) from constant-pool)
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; MIR64: $f10 = XXLXORdpz
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; MIR64: renamable $x3 = LI8 128
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; MIR64: STXVW4X renamable $vsl0, $x1, killed renamable $x5 :: (store (s128), align 8)
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; MIR64: $f11 = XXLXORdpz
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; MIR64: renamable $x4 = LI8 80
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; MIR64: STXVW4X killed renamable $vsl0, $x1, killed renamable $x3 :: (store (s128), align 8)
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; MIR64: $f12 = XXLXORdpz
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; MIR64: STXVD2X killed renamable $vsl13, $x1, killed renamable $x4 :: (store (s128))
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; MIR64: $f13 = XXLXORdpz
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; MIR64: renamable $x5 = LI8 512
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; MIR64: renamable $x6 = LI8 0
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; MIR64: $x3 = LI8 128
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; MIR64: $x4 = LI8 256
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; MIR64: STD killed renamable $x5, 184, $x1 :: (store (s64))
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; MIR64: STD killed renamable $x6, 176, $x1 :: (store (s64))
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; MIR64: BL8_NOP <mcsymbol .callee[PR]>, csr_ppc64_altivec, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $f1, implicit $f2, implicit killed $v2, implicit killed $v3, implicit killed $v4, implicit killed $v5, implicit killed $v6, implicit killed $v7, implicit killed $v8, implicit killed $v9, implicit killed $v10, implicit killed $v11, implicit killed $v12, implicit killed $v13, implicit $f3, implicit $f4, implicit $f5, implicit $f6, implicit $f7, implicit $f8, implicit $f9, implicit $f10, implicit $f11, implicit $f12, implicit $f13, implicit $x2, implicit-def $r1, implicit-def $f1
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; MIR64: ADJCALLSTACKUP 224, 0, implicit-def dead $r1, implicit $r1
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; MIR64: BLR8 implicit $lr8, implicit $rm, implicit $f1
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entry:
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%call = tail call double @callee(i32 signext 128, i32 signext 256, double 0.000000e+00, double 0.000000e+00, <2 x double> <double 0.000000e+00, double 0.000000e+00>, <2 x double> <double 0.000000e+00, double 0.000000e+00>, <2 x double> <double 0.000000e+00, double 0.000000e+00>, <2 x double> <double 0.000000e+00, double 0.000000e+00>, <2 x double> <double 0.000000e+00, double 0.000000e+00>, <2 x double> <double 0.000000e+00, double 0.000000e+00>, <2 x double> <double 0.000000e+00, double 0.000000e+00>, <2 x double> <double 0.000000e+00, double 0.000000e+00>, <2 x double> <double 0.000000e+00, double 0.000000e+00>, <2 x double> <double 0.000000e+00, double 0.000000e+00>, <2 x double> <double 0.000000e+00, double 0.000000e+00>, <2 x double> <double 0.000000e+00, double 0.000000e+00>, <2 x double> <double 2.400000e+01, double 2.500000e+01>, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, i32 signext 512, %struct.Test* nonnull byval(%struct.Test) align 4 @__const.caller.t)
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ret double %call
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}
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declare double @callee(i32 signext, i32 signext, double, double, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, double, double, double, double, double, double, double, double, double, double, double, i32 signext, %struct.Test* byval(%struct.Test) align 8)
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