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c75e6e294f
This patch adds proper handling of -target-abi, as accepted by llvm-mc and llc. Lowering (codegen) for the hard-float ABIs will follow in a subsequent patch. However, this patch does add MC layer support for the hard float and RVE ABIs (emission of the appropriate ELF flags https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#-file-header). ABI parsing must be shared between codegen and the MC layer, so we add computeTargetABI to RISCVUtils. A warning will be printed if an invalid or unrecognized ABI is given. Differential Revision: https://reviews.llvm.org/D59023 llvm-svn: 355771
59 lines
3.3 KiB
LLVM
59 lines
3.3 KiB
LLVM
; RUN: llc -mtriple=riscv32 -target-abi foo < %s 2>&1 \
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; RUN: | FileCheck -check-prefix=RV32I-FOO %s
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; RUN: llc -mtriple=riscv32 -mattr=+f -target-abi ilp32foof < %s 2>&1 \
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; RUN: | FileCheck -check-prefix=RV32IF-ILP32FOOF %s
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; RV32I-FOO: 'foo' is not a recognized ABI for this target (ignoring target-abi)
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; RV32IF-ILP32FOOF: 'ilp32foof' is not a recognized ABI for this target (ignoring target-abi)
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; RUN: llc -mtriple=riscv64 -target-abi ilp32 < %s 2>&1 \
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; RUN: | FileCheck -check-prefix=RV64I-ILP32 %s
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; RUN: llc -mtriple=riscv64 -mattr=+f -target-abi ilp32f < %s 2>&1 \
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; RUN: | FileCheck -check-prefix=RV64IF-ILP32F %s
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; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi ilp32d < %s 2>&1 \
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; RUN: | FileCheck -check-prefix=RV64IFD-ILP32D %s
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; RUN: llc -mtriple=riscv64 -target-abi ilp32e < %s 2>&1 \
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; RUN: | FileCheck -check-prefix=RV64I-ILP32E %s
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; RV64I-ILP32: 32-bit ABIs are not supported for 64-bit targets (ignoring target-abi)
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; RV64IF-ILP32F: 32-bit ABIs are not supported for 64-bit targets (ignoring target-abi)
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; RV64IFD-ILP32D: 32-bit ABIs are not supported for 64-bit targets (ignoring target-abi)
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; RV64I-ILP32E: 32-bit ABIs are not supported for 64-bit targets (ignoring target-abi)
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; RUN: llc -mtriple=riscv32 -target-abi lp64 < %s 2>&1 \
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; RUN: | FileCheck -check-prefix=RV32I-LP64 %s
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; RUN: llc -mtriple=riscv32 -mattr=+f -target-abi lp64f < %s 2>&1 \
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; RUN: | FileCheck -check-prefix=RV32IF-LP64F %s
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; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi lp64d < %s 2>&1 \
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; RUN: | FileCheck -check-prefix=RV32IFD-LP64D %s
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; RV32I-LP64: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
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; RV32IF-LP64F: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
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; RV32IFD-LP64D: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
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; RUN: llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \
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; RUN: | FileCheck -check-prefix=RV32I-ILP32F %s
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; RUN: llc -mtriple=riscv64 -target-abi lp64f < %s 2>&1 \
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; RUN: | FileCheck -check-prefix=RV64I-LP64F %s
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; RV32I-ILP32F: Hard-float 'f' ABI can't be used for a target that doesn't support the F instruction set extension (ignoring target-abi)
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; RV64I-LP64F: Hard-float 'f' ABI can't be used for a target that doesn't support the F instruction set extension (ignoring target-abi)
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; RUN: llc -mtriple=riscv32 -target-abi ilp32d < %s 2>&1 \
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; RUN: | FileCheck -check-prefix=RV32I-ILP32D %s
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; RUN: llc -mtriple=riscv32 -mattr=+f -target-abi ilp32d < %s 2>&1 \
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; RUN: | FileCheck -check-prefix=RV32IF-ILP32D %s
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; RUN: llc -mtriple=riscv64 -target-abi lp64d < %s 2>&1 \
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; RUN: | FileCheck -check-prefix=RV64I-LP64D %s
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; RUN: llc -mtriple=riscv64 -mattr=+f -target-abi lp64d < %s 2>&1 \
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; RUN: | FileCheck -check-prefix=RV64IF-LP64D %s
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; RV32I-ILP32D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
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; RV32IF-ILP32D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
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; RV64I-LP64D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
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; RV64IF-LP64D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
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define void @nothing() nounwind {
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ret void
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}
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