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llvm-mirror/docs/AMDGPU/gfx10_vaddr_flat_global.rst
Dmitry Preobrazhensky d2c3f2c3bb [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description.
Summary of changes:
- added description of GFX10;
- added description of operands sccz, vccz, lds_direct, etc;
- minor bugfixing and improvements.

llvm-svn: 365347
2019-07-08 16:50:11 +00:00

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..
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* *
* Automatically generated file, do not edit! *
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.. _amdgpu_synid10_vaddr_flat_global:
vaddr
===========================
A 64-bit flat global address or a 32-bit offset depending on addressing mode:
* Address = :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>` + :ref:`offset12s<amdgpu_synid_flat_offset12s>`. :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>` is a 64-bit address. This mode is indicated by :ref:`saddr<amdgpu_synid10_saddr_flat_global>` set to :ref:`off<amdgpu_synid_off>`.
* Address = :ref:`saddr<amdgpu_synid10_saddr_flat_global>` + :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>` + :ref:`offset12s<amdgpu_synid_flat_offset12s>`. :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>` is a 32-bit offset. This mode is used when :ref:`saddr<amdgpu_synid10_saddr_flat_global>` is not :ref:`off<amdgpu_synid_off>`.
.. WARNING:: Assembler currently expects a 64-bit *vaddr* regardless of addressing mode. This have to be fixed.
*Size:* 1 or 2 dwords.
*Operands:* :ref:`v<amdgpu_synid_v>`