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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
llvm-mirror/test/MC/Disassembler/RISCV
Alex Bradbury 02c51ed077 [RISCV] Fix test/MC/Disassembler/RISCV/invalid-instruction.txt after rL347988
The test for [0x00 0x00] failed due to the introduction of c.unimp.

This particular test is unnecessary now that c.unimp was defined (and is 
tested in test/MC/RISCV/rv32c-valid.s).

llvm-svn: 348117
2018-12-03 10:35:46 +00:00
..
fuzzer-invalid.txt
invalid-fp-rounding-mode.txt
invalid-instruction.txt [RISCV] Fix test/MC/Disassembler/RISCV/invalid-instruction.txt after rL347988 2018-12-03 10:35:46 +00:00
lit.local.cfg
unknown-fence-field.txt [RISCV] Fix disassembling of fence instruction with invalid field 2018-10-11 22:49:13 +00:00