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b8ce0f8bbd
llvm-svn: 30801 |
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.. | ||
.cvsignore | ||
ARM.h | ||
ARM.td | ||
ARMAsmPrinter.cpp | ||
ARMFrameInfo.h | ||
ARMInstrInfo.cpp | ||
ARMInstrInfo.h | ||
ARMInstrInfo.td | ||
ARMISelDAGToDAG.cpp | ||
ARMMul.cpp | ||
ARMRegisterInfo.cpp | ||
ARMRegisterInfo.h | ||
ARMRegisterInfo.td | ||
ARMTargetAsmInfo.cpp | ||
ARMTargetAsmInfo.h | ||
ARMTargetMachine.cpp | ||
ARMTargetMachine.h | ||
Makefile | ||
README.txt |
//===---------------------------------------------------------------------===// // Random ideas for the ARM backend. //===---------------------------------------------------------------------===// Consider implementing a select with two conditional moves: cmp x, y moveq dst, a movne dst, b ---------------------------------------------------------- %tmp1 = shl int %b, ubyte %c %tmp4 = add int %a, %tmp1 compiles to add r0, r0, r1, lsl r2 but %tmp1 = shl int %b, ubyte %c %tmp4 = add int %tmp1, %a compiles to mov r1, r1, lsl r2 add r0, r1, r0 ---------------------------------------------------------- add an offset to FLDS addressing mode ----------------------------------------------------------