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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
24 lines
534 B
YAML
24 lines
534 B
YAML
# RUN: not llc -mtriple=aarch64-none-linux-gnu -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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--- |
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@var_i32 = global i32 42
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@var_i64 = global i64 0
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define i32 @sub_small() {
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entry:
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%val32 = load i32, i32* @var_i32
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ret i32 %val32
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}
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...
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---
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name: sub_small
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body: |
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bb.0.entry:
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$x8 = ADRP target-flags(aarch64-page) @var_i32
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; CHECK: [[@LINE+1]]:60: expected the name of the target flag
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$w0 = LDRWui killed $x8, target-flags(aarch64-pageoff, ) @var_i32
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RET_ReallyLR implicit $w0
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...
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