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llvm-mirror/test/CodeGen/MIR/AArch64/expected-target-flag-name.mir
Puyan Lotfi d4c615be8c Followup on Proposal to move MIR physical register namespace to '$' sigil.
Discussed here:

http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html

In preparation for adding support for named vregs we are changing the sigil for
physical registers in MIR to '$' from '%'. This will prevent name clashes of
named physical register with named vregs.

llvm-svn: 323922
2018-01-31 22:04:26 +00:00

24 lines
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# RUN: not llc -mtriple=aarch64-none-linux-gnu -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
--- |
@var_i32 = global i32 42
@var_i64 = global i64 0
define i32 @sub_small() {
entry:
%val32 = load i32, i32* @var_i32
ret i32 %val32
}
...
---
name: sub_small
body: |
bb.0.entry:
$x8 = ADRP target-flags(aarch64-page) @var_i32
; CHECK: [[@LINE+1]]:60: expected the name of the target flag
$w0 = LDRWui killed $x8, target-flags(aarch64-pageoff, ) @var_i32
RET_ReallyLR implicit $w0
...