llvm-mirror

mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 03:33:20 +01:00

History

Puyan Lotfi b93eb7f63b [MIR-Canon] Adding ISA-Agnostic COPY Folding. Transforms the following: %vreg1234:gpr32 = COPY %42 %vreg1235:gpr32 = COPY %vreg1234 %vreg1236:gpr32 = COPY %vreg1235 $w0 = COPY %vreg1236 into: $w0 = COPY %42 Assuming %42 is also a gpr32 llvm-svn: 330113		2018-04-16 09:03:03 +00:00
..
AArch64	[MIR-Canon] Adding ISA-Agnostic COPY Folding.	2018-04-16 09:03:03 +00:00
AMDGPU	Attempting to work around a non-determinism issue.	2018-04-11 20:29:32 +00:00
ARM	Followup on Proposal to move MIR physical register namespace to '$' sigil.	2018-01-31 22:04:26 +00:00
Generic	[MIR] Add support for MachineFrameInfo::LocalFrameSize	2018-04-06 08:56:25 +00:00
Hexagon	Followup on Proposal to move MIR physical register namespace to '$' sigil.	2018-01-31 22:04:26 +00:00
Mips	Followup on Proposal to move MIR physical register namespace to '$' sigil.	2018-01-31 22:04:26 +00:00
NVPTX	[MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.	2018-01-10 00:56:48 +00:00
PowerPC	Followup on Proposal to move MIR physical register namespace to '$' sigil.	2018-01-31 22:04:26 +00:00
X86	[MIR] Allow frame-setup and frame-destroy on the same instruction	2018-03-13 19:53:16 +00:00
README	Add README describing the intention of test/CodeGen/MIR	2016-12-09 20:16:12 +00:00

README

This directory contains tests for the MIR file format parser and printer. It
was necessary to split the tests across different targets as no single target
covers all features available in machine IR.

Tests for codegen passes should NOT be here but in test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.