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For the supported binops (basic arithmetic, logicals + shifts), if we fail to simplify the demanded vector elts, then call SimplifyMultipleUseDemandedBits and try to peek through ops to remove unnecessary dependencies. This helps with PR40502. Differential Revision: https://reviews.llvm.org/D79003
161 lines
6.0 KiB
LLVM
161 lines
6.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
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; Each pair of tests should be logically equivalent,
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; so codegen should be the same and optimal for each pair.
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define <4 x float> @splat0_before_fmul_constant(<4 x float> %a) {
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; CHECK-LABEL: splat0_before_fmul_constant:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmov v1.4s, #3.00000000
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; CHECK-NEXT: fmul v0.4s, v1.4s, v0.s[0]
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; CHECK-NEXT: ret
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%splat = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> zeroinitializer
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%mul = fmul <4 x float> %splat, <float 3.0, float 3.0, float 3.0, float 3.0>
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ret <4 x float> %mul
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}
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define <4 x float> @splat0_after_fmul_constant(<4 x float> %a) {
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; CHECK-LABEL: splat0_after_fmul_constant:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmov v1.4s, #3.00000000
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; CHECK-NEXT: fmul v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: dup v0.4s, v0.s[0]
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; CHECK-NEXT: ret
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%mul = fmul <4 x float> %a, <float 3.0, float 42.0, float 3.0, float 3.0>
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%splat = shufflevector <4 x float> %mul, <4 x float> undef, <4 x i32> zeroinitializer
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ret <4 x float> %splat
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}
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; Try different type and splat lane.
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define <2 x double> @splat1_before_fmul_constant(<2 x double> %a) {
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; CHECK-LABEL: splat1_before_fmul_constant:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmov v1.2d, #5.00000000
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; CHECK-NEXT: fmul v0.2d, v1.2d, v0.d[1]
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; CHECK-NEXT: ret
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%splat = shufflevector <2 x double> %a, <2 x double> undef, <2 x i32> <i32 1, i32 1>
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%mul = fmul <2 x double> %splat, <double 5.0, double 5.0>
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ret <2 x double> %mul
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}
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define <2 x double> @splat1_after_fmul_constant(<2 x double> %a) {
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; CHECK-LABEL: splat1_after_fmul_constant:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmov v1.2d, #5.00000000
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; CHECK-NEXT: fmul v0.2d, v0.2d, v1.2d
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; CHECK-NEXT: dup v0.2d, v0.d[1]
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; CHECK-NEXT: ret
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%mul = fmul <2 x double> %a, <double -1.0, double 5.0>
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%splat = shufflevector <2 x double> %mul, <2 x double> undef, <2 x i32> <i32 1, i32 1>
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ret <2 x double> %splat
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}
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; 2 variable operands
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define <2 x double> @splat1_before_fmul(<2 x double> %a, <2 x double> %b) {
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; CHECK-LABEL: splat1_before_fmul:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmul v0.2d, v0.2d, v1.2d
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; CHECK-NEXT: dup v0.2d, v0.d[1]
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; CHECK-NEXT: ret
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%splata = shufflevector <2 x double> %a, <2 x double> undef, <2 x i32> <i32 1, i32 1>
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%splatb = shufflevector <2 x double> %b, <2 x double> undef, <2 x i32> <i32 1, i32 1>
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%mul = fmul <2 x double> %splata, %splatb
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ret <2 x double> %mul
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}
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define <2 x double> @splat1_after_fmul(<2 x double> %a, <2 x double> %b) {
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; CHECK-LABEL: splat1_after_fmul:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmul v0.2d, v0.2d, v1.2d
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; CHECK-NEXT: dup v0.2d, v0.d[1]
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; CHECK-NEXT: ret
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%mul = fmul <2 x double> %a, %b
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%splat = shufflevector <2 x double> %mul, <2 x double> undef, <2 x i32> <i32 1, i32 1>
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ret <2 x double> %splat
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}
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; Integer multiply
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define <4 x i32> @splat2_before_mul_constant(<4 x i32> %a) {
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; CHECK-LABEL: splat2_before_mul_constant:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi v1.4s, #3
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; CHECK-NEXT: mul v0.4s, v1.4s, v0.s[2]
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; CHECK-NEXT: ret
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%splat = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 2, i32 undef, i32 2, i32 undef>
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%mul = mul <4 x i32> %splat, <i32 3, i32 3, i32 3, i32 3>
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ret <4 x i32> %mul
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}
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define <4 x i32> @splat2_after_mul_constant(<4 x i32> %a) {
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; CHECK-LABEL: splat2_after_mul_constant:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi v1.4s, #3
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; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: dup v0.4s, v0.s[2]
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; CHECK-NEXT: ret
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%mul = mul <4 x i32> %a, <i32 3, i32 3, i32 3, i32 3>
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%splat = shufflevector <4 x i32> %mul, <4 x i32> undef, <4 x i32> <i32 2, i32 undef, i32 2, i32 undef>
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ret <4 x i32> %splat
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}
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; Different type, lane, and 2 variable operands.
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define <8 x i16> @splat1_before_mul(<8 x i16> %a, <8 x i16> %b) {
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; CHECK-LABEL: splat1_before_mul:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mul v0.8h, v0.8h, v1.8h
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; CHECK-NEXT: dup v0.8h, v0.h[1]
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; CHECK-NEXT: ret
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%splata = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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%splatb = shufflevector <8 x i16> %b, <8 x i16> undef, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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%mul = mul <8 x i16> %splata, %splatb
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ret <8 x i16> %mul
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}
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define <8 x i16> @splat1_after_mul(<8 x i16> %a, <8 x i16> %b) {
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; CHECK-LABEL: splat1_after_mul:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mul v0.8h, v0.8h, v1.8h
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; CHECK-NEXT: dup v0.8h, v0.h[1]
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; CHECK-NEXT: ret
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%mul = mul <8 x i16> %a, %b
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%splat = shufflevector <8 x i16> %mul, <8 x i16> undef, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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ret <8 x i16> %splat
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}
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; Multiple multiplies.
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define <4 x float> @splat0_before_fmul_fmul_constant(<4 x float> %a) {
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; CHECK-LABEL: splat0_before_fmul_fmul_constant:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmov v1.4s, #3.00000000
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; CHECK-NEXT: fmul v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: fmov v1.4s, #6.00000000
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; CHECK-NEXT: fmul v0.4s, v1.4s, v0.s[0]
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; CHECK-NEXT: ret
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%splat1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> zeroinitializer
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%mul1 = fmul <4 x float> %splat1, <float 3.0, float 3.0, float 3.0, float 3.0>
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%splat2 = shufflevector <4 x float> %mul1, <4 x float> undef, <4 x i32> zeroinitializer
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%mul2 = fmul <4 x float> %splat2, <float 6.0, float 6.0, float 6.0, float 6.0>
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ret <4 x float> %mul2
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}
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define <4 x float> @splat0_after_fmul_fmul_constant(<4 x float> %a) {
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; CHECK-LABEL: splat0_after_fmul_fmul_constant:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmov v1.4s, #3.00000000
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; CHECK-NEXT: fmul v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: fmov v1.4s, #6.00000000
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; CHECK-NEXT: fmul v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: dup v0.4s, v0.s[0]
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; CHECK-NEXT: ret
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%mul1 = fmul <4 x float> %a, <float 3.0, float 42.0, float 3.0, float 3.0>
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%mul2 = fmul <4 x float> %mul1, <float 6.0, float 42.0, float 3.0, float 3.0>
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%splat = shufflevector <4 x float> %mul2, <4 x float> undef, <4 x i32> zeroinitializer
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ret <4 x float> %splat
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}
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