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https://github.com/RPCS3/llvm-mirror.git
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a9d5f92f0d
This patch extends LowerMGATHER/MSCATTER to make use of the vector + reg/immediate
addressing modes for scalable masked gathers & scatters.
selectGatherScatterAddrMode checks if the base pointer is null, in which case
we can swap the base pointer and the index, e.g.
getelementptr nullptr, <vscale x N x T> (splat(%offset)) + %indices)
-> getelementptr %offset, <vscale x N x T> %indices
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D93132
139 lines
6.6 KiB
LLVM
139 lines
6.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s
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define void @masked_scatter_nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x i8*> %bases, <vscale x 2 x i1> %mask) {
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; CHECK-LABEL: masked_scatter_nxv2i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1b { z0.d }, p0, [z1.d, #1]
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; CHECK-NEXT: ret
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%ptrs = getelementptr i8, <vscale x 2 x i8*> %bases, i32 1
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call void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %mask)
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ret void
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}
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define void @masked_scatter_nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x i16*> %bases, <vscale x 2 x i1> %mask) {
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; CHECK-LABEL: masked_scatter_nxv2i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1h { z0.d }, p0, [z1.d, #2]
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; CHECK-NEXT: ret
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%ptrs = getelementptr i16, <vscale x 2 x i16*> %bases, i32 1
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call void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %mask)
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ret void
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}
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define void @masked_scatter_nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x i32*> %bases, <vscale x 2 x i1> %mask) {
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; CHECK-LABEL: masked_scatter_nxv2i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1w { z0.d }, p0, [z1.d, #4]
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; CHECK-NEXT: ret
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%ptrs = getelementptr i32, <vscale x 2 x i32*> %bases, i32 1
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call void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x i32*> %ptrs, i32 4, <vscale x 2 x i1> %mask)
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ret void
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}
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define void @masked_scatter_nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i64*> %bases, <vscale x 2 x i1> %mask) {
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; CHECK-LABEL: masked_scatter_nxv2i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1d { z0.d }, p0, [z1.d, #8]
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; CHECK-NEXT: ret
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%ptrs = getelementptr i64, <vscale x 2 x i64*> %bases, i32 1
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call void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i64*> %ptrs, i32 8, <vscale x 2 x i1> %mask)
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ret void
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}
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define void @masked_scatter_nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x half*> %bases, <vscale x 2 x i1> %mask) {
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; CHECK-LABEL: masked_scatter_nxv2f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1h { z0.d }, p0, [z1.d, #4]
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; CHECK-NEXT: ret
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%ptrs = getelementptr half, <vscale x 2 x half*> %bases, i32 2
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call void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x half*> %ptrs, i32 2, <vscale x 2 x i1> %mask)
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ret void
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}
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define void @masked_scatter_nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x bfloat*> %bases, <vscale x 2 x i1> %mask) #0 {
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; CHECK-LABEL: masked_scatter_nxv2bf16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1h { z0.d }, p0, [z1.d, #4]
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; CHECK-NEXT: ret
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%ptrs = getelementptr bfloat, <vscale x 2 x bfloat*> %bases, i32 2
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call void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x bfloat*> %ptrs, i32 2, <vscale x 2 x i1> %mask)
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ret void
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}
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define void @masked_scatter_nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x float*> %bases, <vscale x 2 x i1> %mask) {
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; CHECK-LABEL: masked_scatter_nxv2f32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1w { z0.d }, p0, [z1.d, #12]
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; CHECK-NEXT: ret
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%ptrs = getelementptr float, <vscale x 2 x float*> %bases, i32 3
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call void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x float*> %ptrs, i32 4, <vscale x 2 x i1> %mask)
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ret void
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}
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define void @masked_scatter_nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x double*> %bases, <vscale x 2 x i1> %mask) {
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; CHECK-LABEL: masked_scatter_nxv2f64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1d { z0.d }, p0, [z1.d, #32]
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; CHECK-NEXT: ret
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%ptrs = getelementptr double, <vscale x 2 x double*> %bases, i32 4
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call void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x double*> %ptrs, i32 8, <vscale x 2 x i1> %mask)
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ret void
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}
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; Test where the immediate is out of range
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define void @masked_scatter_nxv2i8_range(<vscale x 2 x i8> %data, <vscale x 2 x i8*> %bases, <vscale x 2 x i1> %mask) {
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; CHECK-LABEL: masked_scatter_nxv2i8_range:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #32
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; CHECK-NEXT: st1b { z0.d }, p0, [x8, z1.d]
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; CHECK-NEXT: ret
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%ptrs = getelementptr i8, <vscale x 2 x i8*> %bases, i32 32
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call void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %mask)
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ret void
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}
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define void @masked_scatter_nxv2i16_range(<vscale x 2 x i16> %data, <vscale x 2 x i16*> %bases, <vscale x 2 x i1> %mask) {
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; CHECK-LABEL: masked_scatter_nxv2i16_range:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #64
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; CHECK-NEXT: st1h { z0.d }, p0, [x8, z1.d]
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; CHECK-NEXT: ret
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%ptrs = getelementptr i16, <vscale x 2 x i16*> %bases, i32 32
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call void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %mask)
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ret void
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}
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define void @masked_scatter_nxv2i32_range(<vscale x 2 x i32> %data, <vscale x 2 x i32*> %bases, <vscale x 2 x i1> %mask) {
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; CHECK-LABEL: masked_scatter_nxv2i32_range:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #128
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; CHECK-NEXT: st1w { z0.d }, p0, [x8, z1.d]
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; CHECK-NEXT: ret
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%ptrs = getelementptr i32, <vscale x 2 x i32*> %bases, i32 32
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call void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x i32*> %ptrs, i32 1, <vscale x 2 x i1> %mask)
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ret void
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}
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define void @masked_scatter_nxv2f64_range(<vscale x 2 x double> %data, <vscale x 2 x double*> %bases, <vscale x 2 x i1> %mask) {
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; CHECK-LABEL: masked_scatter_nxv2f64_range:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #256
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; CHECK-NEXT: st1d { z0.d }, p0, [x8, z1.d]
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; CHECK-NEXT: ret
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%ptrs = getelementptr double, <vscale x 2 x double*> %bases, i32 32
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call void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x double*> %ptrs, i32 8, <vscale x 2 x i1> %mask)
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ret void
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}
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declare void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x i8*>, i32, <vscale x 2 x i1>)
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declare void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x i16*>, i32, <vscale x 2 x i1>)
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declare void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i32*>, i32, <vscale x 2 x i1>)
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declare void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64*>, i32, <vscale x 2 x i1>)
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declare void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half>, <vscale x 2 x half*>, i32, <vscale x 2 x i1>)
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declare void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat>, <vscale x 2 x bfloat*>, i32, <vscale x 2 x i1>)
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declare void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float>, <vscale x 2 x float*>, i32, <vscale x 2 x i1>)
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declare void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double*>, i32, <vscale x 2 x i1>)
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attributes #0 = { "target-features"="+sve,+bf16" }
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