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684e62e531
Whether an instruction is deemed to have side effects in determined by whether it has a tblgen pattern that emits a single instruction. Because of the way a lot of the the vcvt instructions are specified either in dagtodag code or with patterns that emit multiple instructions, they don't get marked as not having side effects. This just marks them as not having side effects manually. It can help especially with instruction scheduling, to not create artificial barriers, but one of these tests also managed to produce fewer instructions. Differential Revision: https://reviews.llvm.org/D81639
263 lines
7.9 KiB
LLVM
263 lines
7.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+fullfp16 %s -o - | FileCheck %s --check-prefixes CHECK,CHECK-THUMB
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; RUN: llc -mtriple=armv8.2a-arm-none-eabi -mattr=+fullfp16 %s -o - | FileCheck %s --check-prefixes CHECK,CHECK-ARM
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define i32 @test_ne(i32 %x, i32 %y, i32 %a, i32 %b) {
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; CHECK-LABEL: test_ne:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmov s0, r1
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; CHECK-NEXT: cmp r2, r3
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; CHECK-NEXT: vmov s2, r0
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; CHECK-NEXT: vcvt.f16.u32 s0, s0
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; CHECK-NEXT: vcvt.f16.u32 s2, s2
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; CHECK-NEXT: vseleq.f16 s0, s0, s2
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; CHECK-NEXT: vmov.f16 r0, s0
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; CHECK-NEXT: bx lr
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entry:
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%x.half = uitofp i32 %x to half
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%y.half = uitofp i32 %y to half
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%cmp = icmp ne i32 %a, %b
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%cond = select i1 %cmp, half %x.half, half %y.half
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%0 = bitcast half %cond to i16
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%1 = zext i16 %0 to i32
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ret i32 %1
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}
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define i32 @test_eq(i32 %x, i32 %y, i32 %a, i32 %b) {
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; CHECK-LABEL: test_eq:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmov s0, r0
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; CHECK-NEXT: cmp r2, r3
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; CHECK-NEXT: vmov s2, r1
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; CHECK-NEXT: vcvt.f16.u32 s0, s0
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; CHECK-NEXT: vcvt.f16.u32 s2, s2
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; CHECK-NEXT: vseleq.f16 s0, s0, s2
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; CHECK-NEXT: vmov.f16 r0, s0
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; CHECK-NEXT: bx lr
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entry:
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%x.half = uitofp i32 %x to half
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%y.half = uitofp i32 %y to half
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%cmp = icmp eq i32 %a, %b
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%cond = select i1 %cmp, half %x.half, half %y.half
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%0 = bitcast half %cond to i16
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%1 = zext i16 %0 to i32
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ret i32 %1
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}
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define i32 @test_gt(i32 %x, i32 %y, i32 %a, i32 %b) {
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; CHECK-LABEL: test_gt:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmov s0, r0
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; CHECK-NEXT: cmp r2, r3
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; CHECK-NEXT: vmov s2, r1
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; CHECK-NEXT: vcvt.f16.u32 s0, s0
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; CHECK-NEXT: vcvt.f16.u32 s2, s2
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; CHECK-NEXT: vselgt.f16 s0, s0, s2
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; CHECK-NEXT: vmov.f16 r0, s0
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; CHECK-NEXT: bx lr
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entry:
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%x.half = uitofp i32 %x to half
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%y.half = uitofp i32 %y to half
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%cmp = icmp sgt i32 %a, %b
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%cond = select i1 %cmp, half %x.half, half %y.half
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%0 = bitcast half %cond to i16
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%1 = zext i16 %0 to i32
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ret i32 %1
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}
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define i32 @test_ge(i32 %x, i32 %y, i32 %a, i32 %b) {
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; CHECK-LABEL: test_ge:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmov s0, r0
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; CHECK-NEXT: cmp r2, r3
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; CHECK-NEXT: vmov s2, r1
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; CHECK-NEXT: vcvt.f16.u32 s0, s0
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; CHECK-NEXT: vcvt.f16.u32 s2, s2
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; CHECK-NEXT: vselge.f16 s0, s0, s2
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; CHECK-NEXT: vmov.f16 r0, s0
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; CHECK-NEXT: bx lr
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entry:
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%x.half = uitofp i32 %x to half
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%y.half = uitofp i32 %y to half
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%cmp = icmp sge i32 %a, %b
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%cond = select i1 %cmp, half %x.half, half %y.half
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%0 = bitcast half %cond to i16
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%1 = zext i16 %0 to i32
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ret i32 %1
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}
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define i32 @test_lt(i32 %x, i32 %y, i32 %a, i32 %b) {
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; CHECK-LABEL: test_lt:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmov s0, r1
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; CHECK-NEXT: cmp r2, r3
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; CHECK-NEXT: vmov s2, r0
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; CHECK-NEXT: vcvt.f16.u32 s0, s0
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; CHECK-NEXT: vcvt.f16.u32 s2, s2
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; CHECK-NEXT: vselge.f16 s0, s0, s2
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; CHECK-NEXT: vmov.f16 r0, s0
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; CHECK-NEXT: bx lr
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entry:
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%x.half = uitofp i32 %x to half
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%y.half = uitofp i32 %y to half
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%cmp = icmp slt i32 %a, %b
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%cond = select i1 %cmp, half %x.half, half %y.half
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%0 = bitcast half %cond to i16
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%1 = zext i16 %0 to i32
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ret i32 %1
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}
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define i32 @test_le(i32 %x, i32 %y, i32 %a, i32 %b) {
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; CHECK-LABEL: test_le:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmov s0, r1
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; CHECK-NEXT: cmp r2, r3
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; CHECK-NEXT: vmov s2, r0
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; CHECK-NEXT: vcvt.f16.u32 s0, s0
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; CHECK-NEXT: vcvt.f16.u32 s2, s2
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; CHECK-NEXT: vselgt.f16 s0, s0, s2
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; CHECK-NEXT: vmov.f16 r0, s0
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; CHECK-NEXT: bx lr
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entry:
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%x.half = uitofp i32 %x to half
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%y.half = uitofp i32 %y to half
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%cmp = icmp sle i32 %a, %b
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%cond = select i1 %cmp, half %x.half, half %y.half
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%0 = bitcast half %cond to i16
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%1 = zext i16 %0 to i32
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ret i32 %1
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}
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define i32 @test_hi(i32 %x, i32 %y, i32 %a, i32 %b) {
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; CHECK-THUMB-LABEL: test_hi:
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; CHECK-THUMB: @ %bb.0: @ %entry
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; CHECK-THUMB-NEXT: vmov s0, r1
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; CHECK-THUMB-NEXT: cmp r2, r3
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; CHECK-THUMB-NEXT: vmov s2, r0
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; CHECK-THUMB-NEXT: vcvt.f16.u32 s0, s0
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; CHECK-THUMB-NEXT: vcvt.f16.u32 s2, s2
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; CHECK-THUMB-NEXT: it hi
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; CHECK-THUMB-NEXT: vmovhi.f32 s0, s2
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; CHECK-THUMB-NEXT: vmov.f16 r0, s0
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; CHECK-THUMB-NEXT: bx lr
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;
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; CHECK-ARM-LABEL: test_hi:
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; CHECK-ARM: @ %bb.0: @ %entry
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; CHECK-ARM-NEXT: vmov s0, r1
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; CHECK-ARM-NEXT: cmp r2, r3
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; CHECK-ARM-NEXT: vmov s2, r0
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; CHECK-ARM-NEXT: vcvt.f16.u32 s0, s0
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; CHECK-ARM-NEXT: vcvt.f16.u32 s2, s2
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; CHECK-ARM-NEXT: vmovhi.f32 s0, s2
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; CHECK-ARM-NEXT: vmov.f16 r0, s0
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; CHECK-ARM-NEXT: bx lr
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entry:
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%x.half = uitofp i32 %x to half
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%y.half = uitofp i32 %y to half
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%cmp = icmp ugt i32 %a, %b
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%cond = select i1 %cmp, half %x.half, half %y.half
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%0 = bitcast half %cond to i16
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%1 = zext i16 %0 to i32
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ret i32 %1
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}
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define i32 @test_hs(i32 %x, i32 %y, i32 %a, i32 %b) {
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; CHECK-THUMB-LABEL: test_hs:
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; CHECK-THUMB: @ %bb.0: @ %entry
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; CHECK-THUMB-NEXT: vmov s0, r1
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; CHECK-THUMB-NEXT: cmp r2, r3
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; CHECK-THUMB-NEXT: vmov s2, r0
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; CHECK-THUMB-NEXT: vcvt.f16.u32 s0, s0
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; CHECK-THUMB-NEXT: vcvt.f16.u32 s2, s2
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; CHECK-THUMB-NEXT: it hs
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; CHECK-THUMB-NEXT: vmovhs.f32 s0, s2
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; CHECK-THUMB-NEXT: vmov.f16 r0, s0
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; CHECK-THUMB-NEXT: bx lr
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;
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; CHECK-ARM-LABEL: test_hs:
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; CHECK-ARM: @ %bb.0: @ %entry
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; CHECK-ARM-NEXT: vmov s0, r1
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; CHECK-ARM-NEXT: cmp r2, r3
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; CHECK-ARM-NEXT: vmov s2, r0
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; CHECK-ARM-NEXT: vcvt.f16.u32 s0, s0
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; CHECK-ARM-NEXT: vcvt.f16.u32 s2, s2
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; CHECK-ARM-NEXT: vmovhs.f32 s0, s2
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; CHECK-ARM-NEXT: vmov.f16 r0, s0
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; CHECK-ARM-NEXT: bx lr
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entry:
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%x.half = uitofp i32 %x to half
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%y.half = uitofp i32 %y to half
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%cmp = icmp uge i32 %a, %b
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%cond = select i1 %cmp, half %x.half, half %y.half
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%0 = bitcast half %cond to i16
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%1 = zext i16 %0 to i32
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ret i32 %1
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}
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define i32 @test_lo(i32 %x, i32 %y, i32 %a, i32 %b) {
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; CHECK-THUMB-LABEL: test_lo:
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; CHECK-THUMB: @ %bb.0: @ %entry
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; CHECK-THUMB-NEXT: vmov s0, r1
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; CHECK-THUMB-NEXT: cmp r2, r3
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; CHECK-THUMB-NEXT: vmov s2, r0
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; CHECK-THUMB-NEXT: vcvt.f16.u32 s0, s0
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; CHECK-THUMB-NEXT: vcvt.f16.u32 s2, s2
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; CHECK-THUMB-NEXT: it lo
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; CHECK-THUMB-NEXT: vmovlo.f32 s0, s2
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; CHECK-THUMB-NEXT: vmov.f16 r0, s0
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; CHECK-THUMB-NEXT: bx lr
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;
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; CHECK-ARM-LABEL: test_lo:
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; CHECK-ARM: @ %bb.0: @ %entry
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; CHECK-ARM-NEXT: vmov s0, r1
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; CHECK-ARM-NEXT: cmp r2, r3
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; CHECK-ARM-NEXT: vmov s2, r0
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; CHECK-ARM-NEXT: vcvt.f16.u32 s0, s0
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; CHECK-ARM-NEXT: vcvt.f16.u32 s2, s2
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; CHECK-ARM-NEXT: vmovlo.f32 s0, s2
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; CHECK-ARM-NEXT: vmov.f16 r0, s0
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; CHECK-ARM-NEXT: bx lr
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entry:
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%x.half = uitofp i32 %x to half
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%y.half = uitofp i32 %y to half
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%cmp = icmp ult i32 %a, %b
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%cond = select i1 %cmp, half %x.half, half %y.half
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%0 = bitcast half %cond to i16
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%1 = zext i16 %0 to i32
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ret i32 %1
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}
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define i32 @test_ls(i32 %x, i32 %y, i32 %a, i32 %b) {
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; CHECK-THUMB-LABEL: test_ls:
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; CHECK-THUMB: @ %bb.0: @ %entry
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; CHECK-THUMB-NEXT: vmov s0, r1
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; CHECK-THUMB-NEXT: cmp r2, r3
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; CHECK-THUMB-NEXT: vmov s2, r0
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; CHECK-THUMB-NEXT: vcvt.f16.u32 s0, s0
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; CHECK-THUMB-NEXT: vcvt.f16.u32 s2, s2
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; CHECK-THUMB-NEXT: it ls
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; CHECK-THUMB-NEXT: vmovls.f32 s0, s2
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; CHECK-THUMB-NEXT: vmov.f16 r0, s0
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; CHECK-THUMB-NEXT: bx lr
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;
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; CHECK-ARM-LABEL: test_ls:
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; CHECK-ARM: @ %bb.0: @ %entry
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; CHECK-ARM-NEXT: vmov s0, r1
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; CHECK-ARM-NEXT: cmp r2, r3
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; CHECK-ARM-NEXT: vmov s2, r0
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; CHECK-ARM-NEXT: vcvt.f16.u32 s0, s0
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; CHECK-ARM-NEXT: vcvt.f16.u32 s2, s2
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; CHECK-ARM-NEXT: vmovls.f32 s0, s2
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; CHECK-ARM-NEXT: vmov.f16 r0, s0
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; CHECK-ARM-NEXT: bx lr
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entry:
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%x.half = uitofp i32 %x to half
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%y.half = uitofp i32 %y to half
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%cmp = icmp ule i32 %a, %b
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%cond = select i1 %cmp, half %x.half, half %y.half
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%0 = bitcast half %cond to i16
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%1 = zext i16 %0 to i32
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ret i32 %1
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}
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