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https://github.com/RPCS3/llvm-mirror.git
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e11b9fcbe6
This reverts commit 73a6a164b84a8195defbb8f5eeb6faecfc478ad4.
130 lines
4.8 KiB
LLVM
130 lines
4.8 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=armv7-linux-gnu -O0 %s -o - | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=thumbv8-linux-gnu -O0 %s -o - | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=thumbv6m-none-eabi -O0 %s -o - | FileCheck %s --check-prefix=CHECK-T1
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; CHECK-T1-NOT: ldrex
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; CHECK-T1-NOT: strex
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define { i8, i1 } @test_cmpxchg_8(i8* %addr, i8 %desired, i8 %new) nounwind {
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; CHECK-LABEL: test_cmpxchg_8:
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; CHECK-DAG: mov [[ADDR:r[0-9]+]], r0
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; CHECK-DAG: mov [[NEW:r[0-9]+]], r2
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; CHECK: dmb ish
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; CHECK: uxtb [[DESIRED:r[0-9]+]], [[DESIRED]]
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; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:
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; CHECK: ldrexb [[OLD:[lr0-9]+]], {{\[}}[[ADDR]]{{\]}}
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; CHECK: cmp [[OLD]], [[DESIRED]]
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; CHECK: bne [[DONE:.LBB[0-9]+_[0-9]+]]
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; CHECK: strexb [[STATUS:r[0-9]+]], [[NEW]], {{\[}}[[ADDR]]{{\]}}
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; CHECK: cmp{{(\.w)?}} [[STATUS]], #0
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; CHECK: bne [[RETRY]]
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; CHECK: [[DONE]]:
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; Materialisation of a boolean is done with sub/clz/lsr
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; CHECK: uxtb [[CMP1:r[0-9]+]], [[DESIRED]]
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; CHECK: sub{{(\.w|s)?}} [[CMP1]], [[OLD]], [[CMP1]]
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; CHECK: clz [[CMP2:r[0-9]+]], [[CMP1]]
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; CHECK: lsr{{(s)?}} {{r[0-9]+}}, [[CMP2]], #5
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; CHECK: dmb ish
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%res = cmpxchg i8* %addr, i8 %desired, i8 %new seq_cst monotonic
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ret { i8, i1 } %res
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}
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define { i16, i1 } @test_cmpxchg_16(i16* %addr, i16 %desired, i16 %new) nounwind {
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; CHECK-LABEL: test_cmpxchg_16:
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; CHECK-DAG: mov [[ADDR:r[0-9]+]], r0
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; CHECK-DAG: mov [[NEW:r[0-9]+]], r2
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; CHECK: dmb ish
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; CHECK: uxth [[DESIRED:r[0-9]+]], [[DESIRED]]
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; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:
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; CHECK: ldrexh [[OLD:[lr0-9]+]], {{\[}}[[ADDR]]{{\]}}
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; CHECK: cmp [[OLD]], [[DESIRED]]
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; CHECK: bne [[DONE:.LBB[0-9]+_[0-9]+]]
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; CHECK: strexh [[STATUS:r[0-9]+]], [[NEW]], {{\[}}[[ADDR]]{{\]}}
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; CHECK: cmp{{(\.w)?}} [[STATUS]], #0
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; CHECK: bne [[RETRY]]
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; CHECK: [[DONE]]:
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; Materialisation of a boolean is done with sub/clz/lsr
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; CHECK: uxth [[CMP1:r[0-9]+]], [[DESIRED]]
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; CHECK: sub{{(\.w|s)?}} [[CMP1]], [[OLD]], [[CMP1]]
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; CHECK: clz [[CMP2:r[0-9]+]], [[CMP1]]
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; CHECK: lsr{{(s)?}} {{r[0-9]+}}, [[CMP2]], #5
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; CHECK: dmb ish
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%res = cmpxchg i16* %addr, i16 %desired, i16 %new seq_cst monotonic
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ret { i16, i1 } %res
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}
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define { i32, i1 } @test_cmpxchg_32(i32* %addr, i32 %desired, i32 %new) nounwind {
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; CHECK-LABEL: test_cmpxchg_32:
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; CHECK-DAG: mov [[ADDR:r[0-9]+]], r0
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; CHECK-DAG: mov [[NEW:r[0-9]+]], r2
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; CHECK: dmb ish
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; CHECK-NOT: uxt
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; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:
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; CHECK: ldrex [[OLD:r[0-9]+]], {{\[}}[[ADDR]]{{\]}}
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; CHECK: cmp [[OLD]], [[DESIRED]]
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; CHECK: bne [[DONE:.LBB[0-9]+_[0-9]+]]
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; CHECK: strex [[STATUS:r[0-9]+]], [[NEW]], {{\[}}[[ADDR]]{{\]}}
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; CHECK: cmp{{(\.w)?}} [[STATUS]], #0
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; CHECK: bne [[RETRY]]
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; CHECK: [[DONE]]:
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; Materialisation of a boolean is done with sub/clz/lsr
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; CHECK: sub{{(s)?}} [[CMP1:r[0-9]+]], [[OLD]], [[DESIRED]]
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; CHECK: clz [[CMP2:r[0-9]+]], [[CMP1]]
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; CHECK: lsr{{(s)?}} {{r[0-9]+}}, [[CMP2]], #5
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; CHECK: dmb ish
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%res = cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst monotonic
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ret { i32, i1 } %res
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}
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define { i64, i1 } @test_cmpxchg_64(i64* %addr, i64 %desired, i64 %new) nounwind {
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; CHECK-LABEL: test_cmpxchg_64:
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; CHECK: mov [[ADDR:r[0-9]+]], r0
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; CHECK: dmb ish
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; CHECK-NOT: uxt
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; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:
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; CHECK: ldrexd [[OLDLO:r[0-9]+]], [[OLDHI:r[0-9]+]], {{\[}}[[ADDR]]{{\]}}
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; CHECK: cmp [[OLDLO]], r6
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; CHECK: cmpeq [[OLDHI]], r7
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; CHECK: bne [[DONE:.LBB[0-9]+_[0-9]+]]
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; CHECK: strexd [[STATUS:[lr0-9]+]], r8, r9, [r1]
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; CHECK: cmp{{(\.w)?}} [[STATUS]], #0
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; CHECK: bne [[RETRY]]
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; CHECK: [[DONE]]:
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; CHECK: dmb ish
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%res = cmpxchg i64* %addr, i64 %desired, i64 %new seq_cst monotonic
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ret { i64, i1 } %res
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}
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define { i64, i1 } @test_nontrivial_args(i64* %addr, i64 %desired, i64 %new) {
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; CHECK-LABEL: test_nontrivial_args:
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; CHECK: mov [[ADDR:r[0-9]+]], r0
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; CHECK: dmb ish
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; CHECK-NOT: uxt
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; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:
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; CHECK: ldrexd [[OLDLO:r[0-9]+]], [[OLDHI:r[0-9]+]], {{\[}}[[ADDR]]{{\]}}
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; CHECK: cmp [[OLDLO]], {{r[0-9]+}}
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; CHECK: cmpeq [[OLDHI]], {{r[0-9]+}}
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; CHECK: bne [[DONE:.LBB[0-9]+_[0-9]+]]
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; CHECK: strexd [[STATUS:r[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}, {{\[}}[[ADDR]]{{\]}}
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; CHECK: cmp{{(\.w)?}} [[STATUS]], #0
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; CHECK: bne [[RETRY]]
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; CHECK: [[DONE]]:
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; CHECK: dmb ish
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%desired1 = add i64 %desired, 1
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%new1 = add i64 %new, 1
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%res = cmpxchg i64* %addr, i64 %desired1, i64 %new1 seq_cst seq_cst
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ret { i64, i1 } %res
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}
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; The following used to trigger an assertion when creating a spill on thumb2
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; for a physreg with RC==GPRPairRegClass.
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; CHECK-LABEL: test_cmpxchg_spillbug:
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; CHECK: ldrexd
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; CHECK: strexd
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; CHECK: bne
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define void @test_cmpxchg_spillbug() {
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%v = cmpxchg i64* undef, i64 undef, i64 undef seq_cst seq_cst
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ret void
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}
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