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88b4c7ca50
For a given floating point load / store pair, if the load value isn't used by any other operations, then consider transforming the pair to integer load / store operations if the target deems the transformation profitable. And we can exploiting much more when there are other operation nodes with chain operand between the load/store pair so long as we keep the chain ordering original. We only replace the register used to load/store from float to integer. I only add testcase in ARM because the TLI.isDesirableToTransformToIntegerOp hook is only enabled in ARM target. Differential Revision: https://reviews.llvm.org/D60601 llvm-svn: 364883
79 lines
2.7 KiB
LLVM
79 lines
2.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s
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; Check if the f32 load / store pair are optimized to i32 load / store.
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; rdar://8944252
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define void @t(i32 %width, float* nocapture %src, float* nocapture %dst, i32 %index) nounwind {
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; CHECK-LABEL: t:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: cmp r0, #0
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; CHECK-NEXT: bxeq lr
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; CHECK-NEXT: LBB0_1: @ %bb
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; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: ldr r9, [r1], r3
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; CHECK-NEXT: subs r0, r0, #1
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; CHECK-NEXT: str r9, [r2], #4
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; CHECK-NEXT: bne LBB0_1
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; CHECK-NEXT: @ %bb.2: @ %return
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; CHECK-NEXT: bx lr
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entry:
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%src6 = bitcast float* %src to i8*
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%0 = icmp eq i32 %width, 0
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br i1 %0, label %return, label %bb
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bb:
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%j.05 = phi i32 [ %2, %bb ], [ 0, %entry ]
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%tmp = mul i32 %j.05, %index
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%uglygep = getelementptr i8, i8* %src6, i32 %tmp
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%src_addr.04 = bitcast i8* %uglygep to float*
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%dst_addr.03 = getelementptr float, float* %dst, i32 %j.05
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%1 = load float, float* %src_addr.04, align 4
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store float %1, float* %dst_addr.03, align 4
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%2 = add i32 %j.05, 1
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%exitcond = icmp eq i32 %2, %width
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br i1 %exitcond, label %return, label %bb
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return:
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ret void
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}
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@a1 = local_unnamed_addr global float 0.000000e+00, align 4
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@a2 = local_unnamed_addr global float 0.000000e+00, align 4
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@a3 = local_unnamed_addr global float 0.000000e+00, align 4
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@a4 = local_unnamed_addr global float 0.000000e+00, align 4
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@a5 = local_unnamed_addr global float 0.000000e+00, align 4
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@a6 = local_unnamed_addr global float 0.000000e+00, align 4
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@a7 = local_unnamed_addr global float 0.000000e+00, align 4
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@a8 = local_unnamed_addr global float 0.000000e+00, align 4
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declare void @_Z3fooddddddddddddddd(float, float, float, float, float, float, float, float)
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; Because this test function is trying to pass float argument by stack,
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; it can be optimized to i32 load / store
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define signext i32 @test() {
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%1 = load float, float* @a1, align 4
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%2 = load float, float* @a2, align 4
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%3 = load float, float* @a3, align 4
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%4 = load float, float* @a4, align 4
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%5 = load float, float* @a5, align 4
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%6 = load float, float* @a6, align 4
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%7 = load float, float* @a7, align 4
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%8 = load float, float* @a8, align 4
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tail call void @_Z3fooddddddddddddddd(float %1, float %2, float %3, float %4, float %5, float %6, float %7, float %8)
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ret i32 0
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}
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; CHECK-LABEL: _test:
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; CHECK: ldr r3, [pc, r3]
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; CHECK: ldr r2, [pc, r2]
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; CHECK: ldr r1, [pc, r1]
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; CHECK: ldr r0, [pc, r0]
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; CHECK: ldr r9, [pc, r9]
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; CHECK: ldr r12, [pc, r12]
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; CHECK: ldr lr, [pc, lr]
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; CHECK: stm sp, {r9, r12, lr}
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; CHECK: ldr r4, [pc, r4]
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; CHECK: str r4, [sp, #12]
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; CHECK: bl __Z3fooddddddddddddddd
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