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llvm-mirror/test/CodeGen/RISCV/prefetch.ll
Alex Bradbury 07b677c028 [SelectionDAG] Support promotion of PREFETCH operands
For targets where i32 is not a legal type (e.g. 64-bit RISC-V), 
LegalizeIntegerTypes must promote the operands of ISD::PREFETCH.

Differential Revision: https://reviews.llvm.org/D53281

llvm-svn: 347980
2018-11-30 10:06:31 +00:00

20 lines
597 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefix=RV32I %s
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefix=RV64I %s
declare void @llvm.prefetch(i8*, i32, i32, i32)
define void @test_prefetch(i8* %a) nounwind {
; RV32I-LABEL: test_prefetch:
; RV32I: # %bb.0:
; RV32I-NEXT: ret
;
; RV64I-LABEL: test_prefetch:
; RV64I: # %bb.0:
; RV64I-NEXT: ret
call void @llvm.prefetch(i8* %a, i32 0, i32 1, i32 2)
ret void
}