1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 10:42:39 +01:00
llvm-mirror/docs/AMDGPU/gfx9_vaddr_4.rst
Dmitry Preobrazhensky 1d7a6567dd [AMDGPU][MC][GFX9][NFC][DOC] Updated AMD GPU assembler syntax description.
Fixed bugs 48639, 49447, 49448, 49449.
2021-07-23 12:59:42 +03:00

22 lines
869 B
ReStructuredText

..
**************************************************
* *
* Automatically generated file, do not edit! *
* *
**************************************************
.. _amdgpu_synid_gfx9_vaddr_4:
vaddr
=====
Image address which includes from one to four dimensional coordinates and other data used to locate a position in the image.
*Size:* 1, 2, 3, 4, 8 or 16 dwords. Actual size depends on opcode, specific image being handled and :ref:`a16<amdgpu_synid_a16>`.
Note 1. Image format and dimensions are encoded in the image resource constant but not in the instruction.
Note 2. Actually image address size may vary from 1 to 13 dwords, but assembler currently supports a limited range of register sequences.
*Operands:* :ref:`v<amdgpu_synid_v>`