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https://github.com/RPCS3/llvm-mirror.git
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60eef4726e
llvm-svn: 322839
59 lines
1.5 KiB
LLVM
59 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefix=RV32I
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define void @jt(i32 %in, i32* %out) {
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; RV32I-LABEL: jt:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: addi a2, zero, 2
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; RV32I-NEXT: blt a2, a0, .LBB0_4
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: addi a3, zero, 1
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; RV32I-NEXT: beq a0, a3, .LBB0_7
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; RV32I-NEXT: # %bb.2: # %entry
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; RV32I-NEXT: bne a0, a2, .LBB0_9
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; RV32I-NEXT: # %bb.3: # %bb2
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; RV32I-NEXT: addi a0, zero, 3
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; RV32I-NEXT: sw a0, 0(a1)
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; RV32I-NEXT: ret
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; RV32I-NEXT: .LBB0_4: # %entry
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; RV32I-NEXT: addi a3, zero, 3
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; RV32I-NEXT: beq a0, a3, .LBB0_8
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; RV32I-NEXT: # %bb.5: # %entry
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; RV32I-NEXT: addi a2, zero, 4
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; RV32I-NEXT: bne a0, a2, .LBB0_9
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; RV32I-NEXT: # %bb.6: # %bb4
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; RV32I-NEXT: addi a0, zero, 1
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; RV32I-NEXT: sw a0, 0(a1)
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; RV32I-NEXT: ret
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; RV32I-NEXT: .LBB0_7: # %bb1
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; RV32I-NEXT: addi a0, zero, 4
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; RV32I-NEXT: sw a0, 0(a1)
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; RV32I-NEXT: ret
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; RV32I-NEXT: .LBB0_8: # %bb3
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; RV32I-NEXT: sw a2, 0(a1)
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; RV32I-NEXT: .LBB0_9: # %exit
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; RV32I-NEXT: ret
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entry:
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switch i32 %in, label %exit [
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i32 1, label %bb1
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i32 2, label %bb2
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i32 3, label %bb3
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i32 4, label %bb4
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]
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bb1:
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store i32 4, i32* %out
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br label %exit
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bb2:
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store i32 3, i32* %out
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br label %exit
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bb3:
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store i32 2, i32* %out
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br label %exit
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bb4:
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store i32 1, i32* %out
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br label %exit
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exit:
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ret void
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}
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