1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
llvm-mirror/test/CodeGen/RISCV
Francis Visoiu Mistrih f7ea499702 Replace "no-frame-pointer-*" function attributes with "frame-pointer"
Part of the effort to refactoring frame pointer code generation. We used
to use two function attributes "no-frame-pointer-elim" and
"no-frame-pointer-elim-non-leaf" to represent three kinds of frame
pointer usage: (all) frames use frame pointer, (non-leaf) frames use
frame pointer, (none) frame use frame pointer. This CL makes the idea
explicit by using only one enum function attribute "frame-pointer"

Option "-frame-pointer=" replaces "-disable-fp-elim" for tools such as
llc.

"no-frame-pointer-elim" and "no-frame-pointer-elim-non-leaf" are still
supported for easy migration to "frame-pointer".

tests are mostly updated with

// replace command line args ‘-disable-fp-elim=false’ with ‘-frame-pointer=none’
grep -iIrnl '\-disable-fp-elim=false' * | xargs sed -i '' -e "s/-disable-fp-elim=false/-frame-pointer=none/g"

// replace command line args ‘-disable-fp-elim’ with ‘-frame-pointer=all’
grep -iIrnl '\-disable-fp-elim' * | xargs sed -i '' -e "s/-disable-fp-elim/-frame-pointer=all/g"

Patch by Yuanfang Chen (tabloid.adroit)!

Differential Revision: https://reviews.llvm.org/D56351

llvm-svn: 351049
2019-01-14 10:55:55 +00:00
..
addc-adde-sube-subc.ll
align.ll
alloca.ll
alu8.ll [RISCV] Introduce codegen patterns for instructions introduced in RV64I 2018-11-30 09:38:44 +00:00
alu16.ll [RISCV] Introduce codegen patterns for instructions introduced in RV64I 2018-11-30 09:38:44 +00:00
alu32.ll [RISCV] Add patterns for RV64I SLLW/SRLW/SRAW instructions 2019-01-12 07:32:31 +00:00
alu64.ll [RISCV] Add patterns for RV64I SLLW/SRLW/SRAW instructions 2019-01-12 07:32:31 +00:00
analyze-branch.ll
arith-with-overflow.ll
atomic-cmpxchg.ll [RISCV][NFC] Add CHECK lines for atomic operations on RV64I 2019-01-11 19:46:48 +00:00
atomic-fence.ll [RISCV][NFC] Add CHECK lines for atomic operations on RV64I 2019-01-11 19:46:48 +00:00
atomic-load-store.ll [RISCV][NFC] Add CHECK lines for atomic operations on RV64I 2019-01-11 19:46:48 +00:00
atomic-rmw.ll [RISCV][NFC] Add CHECK lines for atomic operations on RV64I 2019-01-11 19:46:48 +00:00
bare-select.ll
blockaddress.ll
branch-relaxation.ll
branch.ll
bswap-ctlz-cttz-ctpop.ll
byval.ll
calling-conv-rv32f-ilp32.ll [RISCV] Bugfix for floats passed on the stack with the ILP32 ABI on RV32F 2018-10-04 07:28:49 +00:00
calling-conv-sext-zext.ll
calling-conv.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
calls.ll
compress-inline-asm.ll
compress.ll
disable-tail-calls.ll
div.ll [RISCV] Introduce codegen patterns for RV64M-only instructions 2019-01-12 07:43:06 +00:00
double-arith.ll [RISCV] Add support for the various RISC-V FMA instruction variants 2018-12-13 10:49:05 +00:00
double-br-fcmp.ll
double-calling-conv.ll
double-convert.ll
double-fcmp.ll
double-frem.ll [RISCV] Mark FREM as Expand 2018-11-15 14:46:11 +00:00
double-imm.ll
double-intrinsics.ll [RISCV] Add support for the various RISC-V FMA instruction variants 2018-12-13 10:49:05 +00:00
double-mem.ll
double-previous-failure.ll
double-select-fcmp.ll [RISCV] Regenerate several tests now enableMultipleCopyHints is enabled by default 2018-10-05 18:25:55 +00:00
double-stack-spill-restore.ll
fixups-diff.ll
fixups-relax-diff.ll [RISCV] Support .option relax and .option norelax 2018-11-12 14:25:07 +00:00
float-arith.ll [RISCV] Add support for the various RISC-V FMA instruction variants 2018-12-13 10:49:05 +00:00
float-br-fcmp.ll
float-convert.ll
float-fcmp.ll
float-frem.ll [RISCV] Mark FREM as Expand 2018-11-15 14:46:11 +00:00
float-imm.ll
float-intrinsics.ll [RISCV] Add support for the various RISC-V FMA instruction variants 2018-12-13 10:49:05 +00:00
float-mem.ll
float-select-fcmp.ll
flt-rounds.ll [SelectionDAG] Support result type promotion for FLT_ROUNDS_ 2018-11-30 13:18:33 +00:00
fp128.ll [RISCV] Avoid unnecessary XOR for seteq/setne 0 2018-11-09 14:47:36 +00:00
frame.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
frameaddr-returnaddr.ll [SelectionDAG] Support promotion of FRAMEADDR/RETURNADDR operands 2018-11-30 10:02:06 +00:00
get-setcc-result-type.ll [RISCV] Avoid unnecessary XOR for seteq/setne 0 2018-11-09 14:47:36 +00:00
hoist-global-addr-base.ll
i32-icmp.ll [RISCV] Avoid unnecessary XOR for seteq/setne 0 2018-11-09 14:47:36 +00:00
imm-cse.ll
imm.ll [RISCV] Constant materialisation for RV64I 2018-11-16 10:14:16 +00:00
indirectbr.ll
init-array.ll
inline-asm.ll
interrupt-attr-args-error.ll
interrupt-attr-invalid.ll
interrupt-attr-nocall.ll
interrupt-attr-ret-error.ll
interrupt-attr.ll
jumptable.ll
large-stack.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
lit.local.cfg
lsr-legaladdimm.ll
mem64.ll [RISCV] Introduce codegen patterns for instructions introduced in RV64I 2018-11-30 09:38:44 +00:00
mem.ll
mul.ll [RISCV] Introduce codegen patterns for RV64M-only instructions 2019-01-12 07:43:06 +00:00
musttail-call.ll
option-norelax.ll [RISCV] Support .option relax and .option norelax 2018-11-12 14:25:07 +00:00
option-norvc.ll
option-relax.ll [RISCV] Support .option relax and .option norelax 2018-11-12 14:25:07 +00:00
option-rvc.ll
prefetch.ll [SelectionDAG] Support promotion of PREFETCH operands 2018-11-30 10:06:31 +00:00
rem.ll [RISCV] Introduce codegen patterns for RV64M-only instructions 2019-01-12 07:43:06 +00:00
remat.ll
rotl-rotr.ll
rv64i-exhaustive-w-insts.ll [RISCV] Add patterns for RV64I SLLW/SRLW/SRAW instructions 2019-01-12 07:32:31 +00:00
rv64i-tricky-shifts.ll [RISCV] Remove RV64I SLLW/SRLW/SRAW patterns and add new test cases 2018-12-01 05:00:00 +00:00
rv64m-exhaustive-w-insts.ll [RISCV] Introduce codegen patterns for RV64M-only instructions 2019-01-12 07:43:06 +00:00
select-cc.ll
sext-zext-trunc.ll [RISCV] Introduce codegen patterns for instructions introduced in RV64I 2018-11-30 09:38:44 +00:00
shift-masked-shamt.ll [RISCV] Eliminate unnecessary masking of promoted shift amounts 2018-10-12 23:18:52 +00:00
shifts.ll
tail-calls.ll
umulo-128-legalisation-lowering.ll [RISCV] Avoid unnecessary XOR for seteq/setne 0 2018-11-09 14:47:36 +00:00
vararg.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
wide-mem.ll
zext-with-load-is-free.ll