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llvm-mirror/test/CodeGen/X86/GlobalISel/select-fconstant.mir
Guillaume Chatelet d49cb60862 [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
Summary:
This catches malformed mir files which specify alignment as log2 instead of pow2.
See https://reviews.llvm.org/D65945 for reference,

This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: MatzeB, qcolombet, dschuff, arsenm, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, s.egerton, pzheng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67433

llvm-svn: 371608
2019-09-11 11:16:48 +00:00

110 lines
5.2 KiB
YAML

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
#RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64 --check-prefix=CHECK_SMALL --check-prefix=CHECK_SMALL64 --check-prefix=CHECK_NOPIC64
#RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse2 -code-model=large -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64 --check-prefix=CHECK_LARGE --check-prefix=CHECK_LARGE64
#RUN: llc -mtriple=i386-linux-gnu -mattr=+sse2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK32 --check-prefix=CHECK_SMALL --check-prefix=CHECK_SMALL32
#RUN: llc -mtriple=i386-linux-gnu -mattr=+sse2 -code-model=large -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK32 --check-prefix=CHECK_LARGE --check-prefix=CHECK_LARGE32
#RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse2 -relocation-model=pic -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64 --check-prefix=CHECK_SMALL --check-prefix=CHECK_SMALL64 --check-prefix=CHECK_PIC64
--- |
define float @test_float() {
entry:
ret float 5.500000e+00
}
define double @test_double() {
entry:
ret double 5.500000e+00
}
---
name: test_float
#
alignment: 16
legalized: true
regBankSelected: true
tracksRegLiveness: true
registers:
- { id: 0, class: vecr, preferred-register: '' }
#
#
body: |
bb.1.entry:
; CHECK_NOPIC64-LABEL: name: test_float
; CHECK_NOPIC64: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg
; CHECK_NOPIC64: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSSrm_alt]]
; CHECK_NOPIC64: $xmm0 = COPY [[COPY]]
; CHECK_NOPIC64: RET 0, implicit $xmm0
; CHECK_LARGE64-LABEL: name: test_float
; CHECK_LARGE64: [[MOV64ri:%[0-9]+]]:gr64 = MOV64ri %const.0
; CHECK_LARGE64: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt [[MOV64ri]], 1, $noreg, 0, $noreg :: (load 8 from constant-pool, align 32)
; CHECK_LARGE64: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSSrm_alt]]
; CHECK_LARGE64: $xmm0 = COPY [[COPY]]
; CHECK_LARGE64: RET 0, implicit $xmm0
; CHECK_SMALL32-LABEL: name: test_float
; CHECK_SMALL32: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt $noreg, 1, $noreg, %const.0, $noreg
; CHECK_SMALL32: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSSrm_alt]]
; CHECK_SMALL32: $xmm0 = COPY [[COPY]]
; CHECK_SMALL32: RET 0, implicit $xmm0
; CHECK_LARGE32-LABEL: name: test_float
; CHECK_LARGE32: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt $noreg, 1, $noreg, %const.0, $noreg
; CHECK_LARGE32: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSSrm_alt]]
; CHECK_LARGE32: $xmm0 = COPY [[COPY]]
; CHECK_LARGE32: RET 0, implicit $xmm0
; CHECK_PIC64-LABEL: name: test_float
; CHECK_PIC64: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg
; CHECK_PIC64: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSSrm_alt]]
; CHECK_PIC64: $xmm0 = COPY [[COPY]]
; CHECK_PIC64: RET 0, implicit $xmm0
%0:vecr(s32) = G_FCONSTANT float 5.500000e+00
%1:vecr(s128) = G_ANYEXT %0(s32)
$xmm0 = COPY %1(s128)
RET 0, implicit $xmm0
...
---
name: test_double
#
alignment: 16
legalized: true
regBankSelected: true
tracksRegLiveness: true
#
#
registers:
- { id: 0, class: vecr, preferred-register: '' }
#
#
body: |
bb.1.entry:
; CHECK_NOPIC64-LABEL: name: test_double
; CHECK_NOPIC64: [[MOVSDrm_alt:%[0-9]+]]:fr64 = MOVSDrm_alt $rip, 1, $noreg, %const.0, $noreg
; CHECK_NOPIC64: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSDrm_alt]]
; CHECK_NOPIC64: $xmm0 = COPY [[COPY]]
; CHECK_NOPIC64: RET 0, implicit $xmm0
; CHECK_LARGE64-LABEL: name: test_double
; CHECK_LARGE64: [[MOV64ri:%[0-9]+]]:gr64 = MOV64ri %const.0
; CHECK_LARGE64: [[MOVSDrm_alt:%[0-9]+]]:fr64 = MOVSDrm_alt [[MOV64ri]], 1, $noreg, 0, $noreg :: (load 8 from constant-pool, align 64)
; CHECK_LARGE64: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSDrm_alt]]
; CHECK_LARGE64: $xmm0 = COPY [[COPY]]
; CHECK_LARGE64: RET 0, implicit $xmm0
; CHECK_SMALL32-LABEL: name: test_double
; CHECK_SMALL32: [[MOVSDrm_alt:%[0-9]+]]:fr64 = MOVSDrm_alt $noreg, 1, $noreg, %const.0, $noreg
; CHECK_SMALL32: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSDrm_alt]]
; CHECK_SMALL32: $xmm0 = COPY [[COPY]]
; CHECK_SMALL32: RET 0, implicit $xmm0
; CHECK_LARGE32-LABEL: name: test_double
; CHECK_LARGE32: [[MOVSDrm_alt:%[0-9]+]]:fr64 = MOVSDrm_alt $noreg, 1, $noreg, %const.0, $noreg
; CHECK_LARGE32: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSDrm_alt]]
; CHECK_LARGE32: $xmm0 = COPY [[COPY]]
; CHECK_LARGE32: RET 0, implicit $xmm0
; CHECK_PIC64-LABEL: name: test_double
; CHECK_PIC64: [[MOVSDrm_alt:%[0-9]+]]:fr64 = MOVSDrm_alt $rip, 1, $noreg, %const.0, $noreg
; CHECK_PIC64: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSDrm_alt]]
; CHECK_PIC64: $xmm0 = COPY [[COPY]]
; CHECK_PIC64: RET 0, implicit $xmm0
%0:vecr(s64) = G_FCONSTANT double 5.500000e+00
%1:vecr(s128) = G_ANYEXT %0(s64)
$xmm0 = COPY %1(s128)
RET 0, implicit $xmm0
...