Kerry McLaughlin 96fc6c2abc [AArch64][SVE] Add intrinsics for SVE2 cryptographic instructions ... Summary: Implements the following SVE2 intrinsics: - @llvm.aarch64.sve.aesd - @llvm.aarch64.sve.aesimc - @llvm.aarch64.sve.aese - @llvm.aarch64.sve.aesmc - @llvm.aarch64.sve.rax1 - @llvm.aarch64.sve.sm4e - @llvm.aarch64.sve.sm4ekey Reviewers: sdesmalen, c-rhodes, dancgr, cameron.mcinally, efriedma, rengolin Reviewed By: sdesmalen Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, cfe-commits, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D74833		2020-02-24 10:49:31 +00:00
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AArch64	[AArch64][SVE] Add intrinsics for SVE2 cryptographic instructions	2020-02-24 10:49:31 +00:00
AMDGPU	Revert "[AMDGPU] Don’t marke the .note section as ALLOC"	2020-02-21 16:08:30 -08:00
ARC
ARM	Regenerate rotate test. NFC.	2020-02-20 13:54:43 +00:00
AVR
BPF
Generic
Hexagon	[Hexagon] Introduce noop intrinsic to cast between vector predicate types	2020-02-21 07:37:59 -06:00
Inputs
Lanai
Mips	[MIPS GlobalISel] Legalize non-power-of-2 and unaligned load and store	2020-02-19 12:02:27 +01:00
MIR	Revert "Reland "[DebugInfo] Enable the debug entry values feature by default""	2020-02-20 14:41:39 +01:00
MSP430
NVPTX
PowerPC	[XCOFF][AIX] Put undefined symbol name into StringTable when neccessary	2020-02-21 18:18:31 +00:00
RISCV	[RISCV] Implement mayBeEmittedAsTailCall for tail call optimization	2020-02-18 23:56:42 +08:00
SPARC
SystemZ	[SystemZ] Support the kernel back chain.	2020-02-23 13:42:36 -08:00
Thumb	Use SETNE directly rather than SUB/SETNE 0 for stack guard check	2020-02-18 13:21:26 +00:00
Thumb2	[ARM][MVE] Combine more extending masked loads	2020-02-24 07:50:15 +00:00
VE	[VE] TLS codegen	2020-02-18 16:09:12 +01:00
WebAssembly	[WebAssembly] Replace all calls with generalized multivalue calls	2020-02-18 15:55:20 -08:00
WinCFGuard
WinEH
X86	[Intrinsic] Add fixed point saturating division intrinsics.	2020-02-24 10:50:52 +01:00
XCore	[XCore] Add instruction pattern for bitrev	2020-02-21 09:28:49 +08:00