mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-25 12:12:47 +01:00
7f7bfe12ea
Follow-up of D72172 and D72180 This patch passes `uint64_t Address` to print methods of PC-relative operands so that subsequent target specific patches can change `*InstPrinter::print{Operand,PCRelImm,...}` to customize the output. Add MCInstPrinter::PrintBranchImmAsAddress which is set to true by llvm-objdump. ``` // Current llvm-objdump -d output aarch64: 20000: bl #0 ppc: 20000: bl .+4 x86: 20000: callq 0 // Ideal output aarch64: 20000: bl 0x20000 ppc: 20000: bl 0x20004 x86: 20000: callq 0x20005 // GNU objdump -d. The lack of 0x is not ideal because the result cannot be re-assembled aarch64: 20000: bl 20000 ppc: 20000: bl 0x20004 x86: 20000: callq 20005 ``` In `lib/Target/X86/X86GenAsmWriter1.inc` (generated by `llvm-tblgen -gen-asm-writer`): ``` case 12: // CALL64pcrel32, CALLpcrel16, CALLpcrel32, EH_SjLj_Setup, JCXZ, JECXZ, J... - printPCRelImm(MI, 0, O); + printPCRelImm(MI, Address, 0, O); return; ``` Some targets have 2 `printOperand` overloads, one without `Address` and one with `Address`. They should annotate derived `Operand` properly with `let OperandType = "OPERAND_PCREL"`. Reviewed By: jhenderson Differential Revision: https://reviews.llvm.org/D76574
108 lines
3.8 KiB
C++
108 lines
3.8 KiB
C++
//===- AsmWriterInst.h - Classes encapsulating a printable inst -*- C++ -*-===//
|
|
//
|
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
|
// See https://llvm.org/LICENSE.txt for license information.
|
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// These classes implement a parser for assembly strings. The parser splits
|
|
// the string into operands, which can be literal strings (the constant bits of
|
|
// the string), actual operands (i.e., operands from the MachineInstr), and
|
|
// dynamically-generated text, specified by raw C++ code.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef LLVM_UTILS_TABLEGEN_ASMWRITERINST_H
|
|
#define LLVM_UTILS_TABLEGEN_ASMWRITERINST_H
|
|
|
|
#include <string>
|
|
#include <vector>
|
|
|
|
namespace llvm {
|
|
class CodeGenInstruction;
|
|
class Record;
|
|
|
|
struct AsmWriterOperand {
|
|
enum OpType {
|
|
// Output this text surrounded by quotes to the asm.
|
|
isLiteralTextOperand,
|
|
// This is the name of a routine to call to print the operand.
|
|
isMachineInstrOperand,
|
|
// Output this text verbatim to the asm writer. It is code that
|
|
// will output some text to the asm.
|
|
isLiteralStatementOperand
|
|
} OperandType;
|
|
|
|
/// MiOpNo - For isMachineInstrOperand, this is the operand number of the
|
|
/// machine instruction.
|
|
unsigned MIOpNo = 0;
|
|
|
|
/// Str - For isLiteralTextOperand, this IS the literal text. For
|
|
/// isMachineInstrOperand, this is the PrinterMethodName for the operand..
|
|
/// For isLiteralStatementOperand, this is the code to insert verbatim
|
|
/// into the asm writer.
|
|
std::string Str;
|
|
|
|
/// MiModifier - For isMachineInstrOperand, this is the modifier string for
|
|
/// an operand, specified with syntax like ${opname:modifier}.
|
|
std::string MiModifier;
|
|
|
|
bool PCRel = false;
|
|
|
|
// To make VS STL happy
|
|
AsmWriterOperand(OpType op = isLiteralTextOperand):OperandType(op) {}
|
|
|
|
AsmWriterOperand(const std::string &LitStr,
|
|
OpType op = isLiteralTextOperand)
|
|
: OperandType(op), Str(LitStr) {}
|
|
|
|
AsmWriterOperand(const std::string &Printer, unsigned _MIOpNo,
|
|
const std::string &Modifier,
|
|
OpType op = isMachineInstrOperand, bool PCRel = false)
|
|
: OperandType(op), MIOpNo(_MIOpNo), Str(Printer), MiModifier(Modifier),
|
|
PCRel(PCRel) {}
|
|
|
|
bool operator!=(const AsmWriterOperand &Other) const {
|
|
if (OperandType != Other.OperandType || Str != Other.Str) return true;
|
|
if (OperandType == isMachineInstrOperand)
|
|
return MIOpNo != Other.MIOpNo || MiModifier != Other.MiModifier;
|
|
return false;
|
|
}
|
|
bool operator==(const AsmWriterOperand &Other) const {
|
|
return !operator!=(Other);
|
|
}
|
|
|
|
/// getCode - Return the code that prints this operand.
|
|
std::string getCode(bool PassSubtarget) const;
|
|
};
|
|
|
|
class AsmWriterInst {
|
|
public:
|
|
std::vector<AsmWriterOperand> Operands;
|
|
const CodeGenInstruction *CGI;
|
|
unsigned CGIIndex;
|
|
|
|
AsmWriterInst(const CodeGenInstruction &CGI, unsigned CGIIndex,
|
|
unsigned Variant);
|
|
|
|
/// MatchesAllButOneOp - If this instruction is exactly identical to the
|
|
/// specified instruction except for one differing operand, return the
|
|
/// differing operand number. Otherwise return ~0.
|
|
unsigned MatchesAllButOneOp(const AsmWriterInst &Other) const;
|
|
|
|
private:
|
|
void AddLiteralString(const std::string &Str) {
|
|
// If the last operand was already a literal text string, append this to
|
|
// it, otherwise add a new operand.
|
|
if (!Operands.empty() &&
|
|
Operands.back().OperandType == AsmWriterOperand::isLiteralTextOperand)
|
|
Operands.back().Str.append(Str);
|
|
else
|
|
Operands.push_back(AsmWriterOperand(Str));
|
|
}
|
|
};
|
|
}
|
|
|
|
#endif
|