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e23fa40f7f
An encoding does not allow to use SDWA in an instruction with scalar operands, either literals or SGPRs. That is however possible to copy these operands into a VGPR first. Several copies of the value are produced if multiple SDWA conversions were done. To cleanup MachineLICM (to hoist copies out of loops), MachineCSE (to remove duplicate copies) and SIFoldOperands (to replace SGPR to VGPR copy with immediate copy right to the VGPR) runs are added after the SDWA pass. Differential Revision: https://reviews.llvm.org/D33583 llvm-svn: 304219
55 lines
2.2 KiB
LLVM
55 lines
2.2 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; GCN-LABEL: {{^}}test_mul_legacy_f32:
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; GCN: v_mul_legacy_f32_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @test_mul_legacy_f32(float addrspace(1)* %out, float %a, float %b) #0 {
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%result = call float @llvm.amdgcn.fmul.legacy(float %a, float %b)
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store float %result, float addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}test_mul_legacy_undef0_f32:
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; GCN: v_mul_legacy_f32_e32
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define amdgpu_kernel void @test_mul_legacy_undef0_f32(float addrspace(1)* %out, float %a) #0 {
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%result = call float @llvm.amdgcn.fmul.legacy(float undef, float %a)
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store float %result, float addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}test_mul_legacy_undef1_f32:
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; GCN: v_mul_legacy_f32_e32
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define amdgpu_kernel void @test_mul_legacy_undef1_f32(float addrspace(1)* %out, float %a) #0 {
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%result = call float @llvm.amdgcn.fmul.legacy(float %a, float undef)
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store float %result, float addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}test_mul_legacy_fabs_f32:
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; GCN: v_mul_legacy_f32_e64 v{{[0-9]+}}, |s{{[0-9]+}}|, |v{{[0-9]+}}|
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define amdgpu_kernel void @test_mul_legacy_fabs_f32(float addrspace(1)* %out, float %a, float %b) #0 {
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%a.fabs = call float @llvm.fabs.f32(float %a)
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%b.fabs = call float @llvm.fabs.f32(float %b)
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%result = call float @llvm.amdgcn.fmul.legacy(float %a.fabs, float %b.fabs)
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store float %result, float addrspace(1)* %out, align 4
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ret void
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}
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; TODO: Should match mac_legacy/mad_legacy
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; GCN-LABEL: {{^}}test_mad_legacy_f32:
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; GCN: v_mul_legacy_f32_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
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; GCN: v_add_f32_e32
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define amdgpu_kernel void @test_mad_legacy_f32(float addrspace(1)* %out, float %a, float %b, float %c) #0 {
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%mul = call float @llvm.amdgcn.fmul.legacy(float %a, float %b)
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%add = fadd float %mul, %c
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store float %add, float addrspace(1)* %out, align 4
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ret void
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}
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declare float @llvm.fabs.f32(float) #1
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declare float @llvm.amdgcn.fmul.legacy(float, float) #1
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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