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https://github.com/RPCS3/llvm-mirror.git
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485693bdac
Summary: GFX9 and above support sin/cos instructions with a greater range and thus don't require a fract instruction prior to invocation. Added a subtarget feature to reflect this and added code to take advantage of expanded range on GFX9+ Also updated the tests to check correct behaviour Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D51933 Change-Id: I1c1f1d3726a5ae32116646ca5cfa1ab4ef69e5b0 llvm-svn: 342222
135 lines
3.9 KiB
LLVM
135 lines
3.9 KiB
LLVM
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX9,FUNC %s
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; FUNC-LABEL: sin_f32
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; EG: MULADD_IEEE *
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; EG: FRACT *
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; EG: ADD *
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; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
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; EG-NOT: SIN
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; GCN: v_mul_f32
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; SICIVI: v_fract_f32
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; GFX9-NOT: v_fract_f32
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; GCN: v_sin_f32
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; GCN-NOT: v_sin_f32
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define amdgpu_kernel void @sin_f32(float addrspace(1)* %out, float %x) #1 {
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%sin = call float @llvm.sin.f32(float %x)
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store float %sin, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}safe_sin_3x_f32:
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; GCN: v_mul_f32
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; GCN: v_mul_f32
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; SICIVI: v_fract_f32
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; GFX9-NOT: v_fract_f32
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; GCN: v_sin_f32
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; GCN-NOT: v_sin_f32
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define amdgpu_kernel void @safe_sin_3x_f32(float addrspace(1)* %out, float %x) #1 {
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%y = fmul float 3.0, %x
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%sin = call float @llvm.sin.f32(float %y)
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store float %sin, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}unsafe_sin_3x_f32:
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; GCN-NOT: v_add_f32
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; GCN: 0x3ef47644
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; GCN: v_mul_f32
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; SICIVI: v_fract_f32
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; GFX9-NOT: v_fract_f32
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; GCN: v_sin_f32
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; GCN-NOT: v_sin_f32
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define amdgpu_kernel void @unsafe_sin_3x_f32(float addrspace(1)* %out, float %x) #2 {
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%y = fmul float 3.0, %x
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%sin = call float @llvm.sin.f32(float %y)
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store float %sin, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}safe_sin_2x_f32:
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; GCN: v_add_f32
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; GCN: v_mul_f32
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; SICIVI: v_fract_f32
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; GFX9-NOT: v_fract_f32
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; GCN: v_sin_f32
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; GCN-NOT: v_sin_f32
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define amdgpu_kernel void @safe_sin_2x_f32(float addrspace(1)* %out, float %x) #1 {
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%y = fmul float 2.0, %x
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%sin = call float @llvm.sin.f32(float %y)
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store float %sin, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}unsafe_sin_2x_f32:
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; GCN-NOT: v_add_f32
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; GCN: 0x3ea2f983
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; GCN: v_mul_f32
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; SICIVI: v_fract_f32
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; GFX9-NOT: v_fract_f32
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; GCN: v_sin_f32
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; GCN-NOT: v_sin_f32
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define amdgpu_kernel void @unsafe_sin_2x_f32(float addrspace(1)* %out, float %x) #2 {
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%y = fmul float 2.0, %x
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%sin = call float @llvm.sin.f32(float %y)
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store float %sin, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}test_safe_2sin_f32:
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; GCN: v_add_f32
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; GCN: v_mul_f32
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; SICIVI: v_fract_f32
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; GFX9-NOT: v_fract_f32
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; GCN: v_sin_f32
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; GCN-NOT: v_sin_f32
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define amdgpu_kernel void @test_safe_2sin_f32(float addrspace(1)* %out, float %x) #1 {
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%y = fmul float 2.0, %x
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%sin = call float @llvm.sin.f32(float %y)
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store float %sin, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}test_unsafe_2sin_f32:
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; GCN: 0x3ea2f983
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; GCN: v_mul_f32
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; SICIVI: v_fract_f32
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; GFX9-NOT: v_fract_f32
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; GCN: v_sin_f32
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; GCN-NOT: v_sin_f32
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define amdgpu_kernel void @test_unsafe_2sin_f32(float addrspace(1)* %out, float %x) #2 {
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%y = fmul float 2.0, %x
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%sin = call float @llvm.sin.f32(float %y)
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store float %sin, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}sin_v4f32:
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; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
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; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
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; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
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; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
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; EG-NOT: SIN
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; GCN: v_sin_f32
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; GCN: v_sin_f32
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; GCN: v_sin_f32
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; GCN: v_sin_f32
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; GCN-NOT: v_sin_f32
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define amdgpu_kernel void @sin_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %vx) #1 {
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%sin = call <4 x float> @llvm.sin.v4f32( <4 x float> %vx)
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store <4 x float> %sin, <4 x float> addrspace(1)* %out
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ret void
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}
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declare float @llvm.sin.f32(float) #0
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declare <4 x float> @llvm.sin.v4f32(<4 x float>) #0
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind "unsafe-fp-math"="false" }
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attributes #2 = { nounwind "unsafe-fp-math"="true" }
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