Tom Stellard d6c924b960 [AMDGPU][llvm-mc] Support for 32-bit inline literals ... Patch by: Artem Tamazov Summary: Note: Support for 64-bit inline literals TBD Added: Support of abs/neg modifiers for literals (incomplete; parsing TBD). Added: Some TODO comments. Reworked/clarity: rename isInlineImm() to isInlinableImm() Reworked/robustness: disallow BitsToFloat() with undefined value in isInlinableImm() Reworked/reuse: isSSrc32/64(), isVSrc32/64() Tests added. Reviewers: tstellarAMD, arsenm Subscribers: vpykhtin, nhaustov, SamWot, arsenm Projects: #llvm-amdgpu-spb Differential Revision: http://reviews.llvm.org/D17204 llvm-svn: 261559		2016-02-22 19:17:56 +00:00
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AArch64	Followup to 258750; update all MC tests to use .p2align .	2016-01-26 00:27:59 +00:00
AMDGPU	[AMDGPU][llvm-mc] Support for 32-bit inline literals	2016-02-22 19:17:56 +00:00
ARM	Followup to 258750; update all MC tests to use .p2align .	2016-01-26 00:27:59 +00:00
AsmParser	[MC] Fixed parsing of macro arguments where expressions with spaces are present.	2016-02-11 13:48:49 +00:00
COFF	[codeview] Dump def range lengths in hex	2016-02-11 23:40:14 +00:00
Disassembler	[X86] Add some missing reversed forms of XOP instructions.	2016-02-20 06:20:17 +00:00
ELF	Accept subtractions involving a weak symbol.	2016-01-20 18:57:48 +00:00
Hexagon	[Hexagon] Adding relocation for code size, cold path optimization allowing a 23-bit 4-byte aligned relocation to be a valid instruction encoding.	2016-02-16 20:38:17 +00:00
MachO	Form reform for MCDwarf.	2015-12-23 01:57:31 +00:00
Markup
Mips	[mips] added support for trunc macro	2016-02-22 16:00:23 +00:00
PowerPC	[MC] Merge VK_PPC_TPREL in to generic VK_TPREL.	2016-02-10 18:32:01 +00:00
Sparc	[SPARC] Repair floating-point condition encodings in assembly parser.	2016-02-10 17:47:20 +00:00
SystemZ	[SystemZ] Sort relocs to avoid code corruption by linker optimization	2015-12-16 18:12:40 +00:00
X86	AVX512F: Add assembler Intel syntax tests for knl, fix minor bugs.	2016-02-22 12:37:41 +00:00