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c2c2a10170
Since 32-bit instructions with 32-bit input immediate behavior are used to materialize 16-bit constants in 32-bit registers for 16-bit instructions, determining the legality based on the size is incorrect. Change operands to have the size specified in the type. Also adds a workaround for a disassembler bug that produces an immediate MCOperand for an operand that is supposed to be OPERAND_REGISTER. The assembler appears to accept out of bounds immediates and truncates them, but this seems to be an issue for 32-bit already. llvm-svn: 289306 |
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AArch64 | ||
AMDGPU | ||
ARM | ||
AsmParser | ||
AVR | ||
COFF | ||
Disassembler | ||
ELF | ||
Hexagon | ||
Lanai | ||
MachO | ||
Markup | ||
Mips | ||
PowerPC | ||
Sparc | ||
SystemZ | ||
X86 |