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be591983cd
The 2nd loop calculates spill costs but reports free registers as cost 0 anyway, so there is little benefit from having a separate early loop. Surprisingly this is not NFC, as many register are marked regDisabled so the first loop often picks up later registers unnecessarily instead of the first one available in the allocation order... Patch by Matthias Braun llvm-svn: 356499
45 lines
1.2 KiB
LLVM
45 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -O0 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
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; xscvdpsxds should NOT be emitted, since it saturates the result down to i64.
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; We can't use friz here because it may return -0.0 where the original code doesn't.
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define float @f_i128_f(float %v) {
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; CHECK-LABEL: f_i128_f:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr 0
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; CHECK-NEXT: std 0, 16(1)
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; CHECK-NEXT: stdu 1, -32(1)
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: .cfi_offset lr, 16
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; CHECK-NEXT: bl __fixsfti
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; CHECK-NEXT: nop
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; CHECK-NEXT: bl __floattisf
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; CHECK-NEXT: nop
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; CHECK-NEXT: addi 1, 1, 32
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; CHECK-NEXT: ld 0, 16(1)
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; CHECK-NEXT: mtlr 0
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; CHECK-NEXT: blr
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entry:
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%a = fptosi float %v to i128
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%b = sitofp i128 %a to float
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ret float %b
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}
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; NSZ, so it's safe to friz.
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define float @f_i128_fi_nsz(float %v) #0 {
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; CHECK-LABEL: f_i128_fi_nsz:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: friz 0, 1
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; CHECK-NEXT: fmr 1, 0
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; CHECK-NEXT: blr
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entry:
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%a = fptosi float %v to i128
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%b = sitofp i128 %a to float
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ret float %b
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}
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attributes #0 = { "no-signed-zeros-fp-math"="true" }
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