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llvm-mirror/lib/Target/AArch64
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Cong Hou b76a7a8dcb Normalize MBB's successors' probabilities in several locations. 
This patch adds some missing calls to MBB::normalizeSuccProbs() in several
locations where it should be called. Those places are found by checking if the
sum of successors' probabilities is approximate one in MachineBlockPlacement
pass with some instrumented code (not in this patch).


Differential revision: http://reviews.llvm.org/D15259

llvm-svn: 255455
2015-12-13 09:26:17 +00:00
..
AsmParser [AArch64] Add ARMv8.2-A FP16 vector instructions 2015-12-08 12:16:10 +00:00
Disassembler [AArch64] Add ARMv8.2-A UAO PSTATE bit 2015-11-26 15:32:30 +00:00
InstPrinter [AArch64] Add ARMv8.2-A Statistical Profiling Extension 2015-12-01 10:48:51 +00:00
MCTargetDesc [AArch64] Add ARMv8.2-A FP16 scalar instructions 2015-11-27 13:04:48 +00:00
TargetInfo
Utils [AArch64] Add ARMv8.2-A Statistical Profiling Extension 2015-12-01 10:48:51 +00:00
AArch64.h
AArch64.td [AArch64]: Add support for Cortex-A35 2015-12-02 11:53:44 +00:00
AArch64A53Fix835769.cpp AArch64: Remove implicit ilist iterator conversions, NFC 2015-10-13 20:02:15 +00:00
AArch64A57FPLoadBalancing.cpp
AArch64AddressTypePromotion.cpp [AArch64] Make the naming of the Address Type Promotion pass consistent. 2015-08-05 15:32:23 +00:00
AArch64AdvSIMDScalarPass.cpp AArch64: Remove implicit ilist iterator conversions, NFC 2015-10-13 20:02:15 +00:00
AArch64AsmPrinter.cpp
AArch64BranchRelaxation.cpp AArch64: Remove implicit ilist iterator conversions, NFC 2015-10-13 20:02:15 +00:00
AArch64CallingConvention.h Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef. 2015-12-05 07:13:35 +00:00
AArch64CallingConvention.td [CXX TLS calling convention] Add support for AArch64. 2015-12-08 00:14:38 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp AArch64: Make getNextNode() cleanup in r249764 more clear 2015-10-09 16:54:54 +00:00
AArch64CollectLOH.cpp [AArch64][CollectLOH] Remove an invalid assertion and add a test case exposing it. 2015-08-31 19:02:00 +00:00
AArch64ConditionalCompares.cpp Normalize MBB's successors' probabilities in several locations. 2015-12-13 09:26:17 +00:00
AArch64ConditionOptimizer.cpp AArch64: use AddressingModes.h accessors for compare shifts 2015-07-29 16:39:56 +00:00
AArch64DeadRegisterDefinitionsPass.cpp [AArch64] Register AArch64DeadRegisterDefinition pass with LLVM pass manager. 2015-08-05 17:35:34 +00:00
AArch64ExpandPseudoInsts.cpp [AArch64] Register (existing) AArch64ExpandPseudo pass with LLVM pass manager. 2015-08-05 14:22:53 +00:00
AArch64FastISel.cpp AArch64FastISel: Use cbz/cbnz to branch on i1 2015-12-03 17:19:58 +00:00
AArch64FrameLowering.cpp Remove windows line endings introduced by r252177. NFC. 2015-11-05 21:54:58 +00:00
AArch64FrameLowering.h [AArch64] Enable shrink-wrapping by default. 2015-11-18 23:12:20 +00:00
AArch64InstrAtomics.td
AArch64InstrFormats.td [AArch64] Fix FP16 vector instructions that should only accept low registers 2015-12-09 14:32:11 +00:00
AArch64InstrInfo.cpp replace MachineCombinerPattern namespace and enum with enum class; NFCI 2015-11-05 19:34:57 +00:00
AArch64InstrInfo.h replace MachineCombinerPattern namespace and enum with enum class; NFCI 2015-11-05 19:34:57 +00:00
AArch64InstrInfo.td Revert r248483, r242546, r242545, and r242409 - absdiff intrinsics 2015-12-11 23:11:52 +00:00
AArch64ISelDAGToDAG.cpp [AArch64] Fix a corner case in BitFeild select 2015-12-01 19:17:49 +00:00
AArch64ISelLowering.cpp Revert r248483, r242546, r242545, and r242409 - absdiff intrinsics 2015-12-11 23:11:52 +00:00
AArch64ISelLowering.h [AArch64] add overrides for isCheapToSpeculateCttz() and isCheapToSpeculateCtlz() 2015-11-10 18:11:37 +00:00
AArch64LoadStoreOptimizer.cpp [AArch64]Merge narrow zero stores to a wider store 2015-11-20 21:14:07 +00:00
AArch64MachineFunctionInfo.h Fix typo "fuction" noticed in comments in AssumptionCache.h, and also all the other files that have the same typo. All comments, no functionality change! (Merely a "fuctionality" change.) 2015-07-29 22:32:47 +00:00
AArch64MCInstLower.cpp Convert some AArch64 code to foreach loops. NFC. 2015-08-03 19:04:32 +00:00
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp AArch64: Remove implicit ilist iterator conversions, NFC 2015-10-13 20:02:15 +00:00
AArch64RegisterInfo.cpp [CXX TLS calling convention] Add support for AArch64. 2015-12-08 00:14:38 +00:00
AArch64RegisterInfo.h
AArch64RegisterInfo.td [AArch64] Add ARMv8.2-A FP16 vector instructions 2015-12-08 12:16:10 +00:00
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp [AArch64] Add subtarget features for ARMv8.2-A 2015-11-26 15:23:32 +00:00
AArch64Subtarget.h [AArch64]: Add support for Cortex-A35 2015-12-02 11:53:44 +00:00
AArch64TargetMachine.cpp constify the Function parameter to the TTI creation callback and 2015-09-16 23:38:13 +00:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp [AArch64][ARM] Don't base interleaved op legality on type alloc size. 2015-12-09 01:19:50 +00:00
AArch64TargetTransformInfo.h constify the Function parameter to the TTI creation callback and 2015-09-16 23:38:13 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile