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AsmParser
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[AArch64][SVE] Asm: Add support for RDVL/ADDVL/ADDPL instructions
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2018-01-19 15:22:00 +00:00 |
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Disassembler
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Recommit r322073: [AArch64][SVE] Asm: Add predicated ADD/SUB instructions
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2018-01-09 17:01:27 +00:00 |
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InstPrinter
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[AArch64][SVE] Asm: Add SVE (Z) Register definitions and parsing support
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2017-11-07 16:45:48 +00:00 |
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MCTargetDesc
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Thread MCSubtargetInfo through Target::createMCAsmBackend
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2018-01-03 08:53:05 +00:00 |
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TargetInfo
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Add backend name to Target to enable runtime info to be fed back into TableGen
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2017-11-15 23:55:44 +00:00 |
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Utils
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AArch64.h
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[AArch64] Avoid SIMD interleaved store instruction for Exynos.
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2017-12-08 00:58:49 +00:00 |
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AArch64.td
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[AArch64][SVE] Asm: Add parsing of merging/zeroing suffix for SVE predicate vector operands
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2018-01-09 11:17:06 +00:00 |
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AArch64A53Fix835769.cpp
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Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
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2017-11-08 01:01:31 +00:00 |
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AArch64A57FPLoadBalancing.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AArch64AdvSIMDScalarPass.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AArch64AsmPrinter.cpp
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[CodeGen] Hoist common AsmPrinter code out of X86, ARM, and AArch64
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2018-01-17 23:55:23 +00:00 |
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AArch64CallingConvention.h
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Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
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2017-11-08 01:01:31 +00:00 |
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AArch64CallingConvention.td
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AArch64CallLowering.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AArch64CallLowering.h
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AArch64CleanupLocalDynamicTLSPass.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AArch64CollectLOH.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AArch64CondBrTuning.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AArch64ConditionalCompares.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AArch64ConditionOptimizer.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AArch64DeadRegisterDefinitionsPass.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AArch64ExpandPseudoInsts.cpp
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Fix a bunch more layering of CodeGen headers that are in Target
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2017-11-17 01:07:10 +00:00 |
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AArch64FalkorHWPFFix.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AArch64FastISel.cpp
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Silence a bunch of implicit fallthrough warnings
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2017-12-19 22:05:25 +00:00 |
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AArch64FrameLowering.cpp
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AArch64: Fix emergency spillslot being out of reach for large callframes
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2018-01-19 03:16:36 +00:00 |
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AArch64FrameLowering.h
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Move TargetFrameLowering.h to CodeGen where it's implemented
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2017-11-03 22:32:11 +00:00 |
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AArch64GenRegisterBankInfo.def
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[AArch64][RegisterBankInfo] Teach instruction mapping about gpr32 -> fpr16 cross copies
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2017-11-18 04:28:56 +00:00 |
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AArch64InstrAtomics.td
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[globalisel][tablegen] Add support for relative AtomicOrderings
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2017-11-30 21:05:59 +00:00 |
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AArch64InstrFormats.td
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[AArch64][SVE] Asm: Add support for RDVL/ADDVL/ADDPL instructions
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2018-01-19 15:22:00 +00:00 |
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AArch64InstrInfo.cpp
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[MachineOutliner] Move hasAddressTaken check to MachineOutliner.cpp
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2018-01-13 00:42:28 +00:00 |
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AArch64InstrInfo.h
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[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
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2018-01-09 00:26:18 +00:00 |
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AArch64InstrInfo.td
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[AArch64] Fix incorrect LD1 of 16-bit FP vectors in big endian
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2018-01-17 14:39:29 +00:00 |
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AArch64InstructionSelector.cpp
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[AArch64][GlobalISel] Add isel support for global values in the large code model.
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2018-01-18 19:21:27 +00:00 |
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AArch64ISelDAGToDAG.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AArch64ISelLowering.cpp
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AArch64: Fix emergency spillslot being out of reach for large callframes
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2018-01-19 03:16:36 +00:00 |
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AArch64ISelLowering.h
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AArch64: Fix emergency spillslot being out of reach for large callframes
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2018-01-19 03:16:36 +00:00 |
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AArch64LegalizerInfo.cpp
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Revert r319691: [globalisel][tablegen] Split atomic load/store into separate opcode and enable for AArch64.
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2017-12-05 05:52:07 +00:00 |
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AArch64LegalizerInfo.h
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[aarch64][globalisel] Define G_ATOMIC_CMPXCHG and G_ATOMICRMW_* and make them legal
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2017-11-28 20:21:15 +00:00 |
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AArch64LoadStoreOptimizer.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AArch64MachineFunctionInfo.h
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AArch64MacroFusion.cpp
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Remove redundant includes from lib/Target/AArch64.
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2017-12-14 10:36:20 +00:00 |
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AArch64MacroFusion.h
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AArch64MCInstLower.cpp
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Fix a bunch more layering of CodeGen headers that are in Target
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2017-11-17 01:07:10 +00:00 |
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AArch64MCInstLower.h
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AArch64PBQPRegAlloc.cpp
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Rename LiveIntervalAnalysis.h to LiveIntervals.h
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2017-12-13 02:51:04 +00:00 |
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AArch64PBQPRegAlloc.h
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AArch64PerfectShuffle.h
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AArch64PromoteConstant.cpp
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AArch64RedundantCopyElimination.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AArch64RegisterBankInfo.cpp
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[AArch64] Map G_LOAD on FPR when the definition goes to a copy to FPR
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2017-11-18 04:28:59 +00:00 |
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AArch64RegisterBankInfo.h
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[AArch64][RegisterBankInfo] Add mapping for G_FPEXT.
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2017-11-02 23:38:19 +00:00 |
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AArch64RegisterBanks.td
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AArch64RegisterInfo.cpp
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AArch64: Fix emergency spillslot being out of reach for large callframes
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2018-01-19 03:16:36 +00:00 |
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AArch64RegisterInfo.h
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AArch64RegisterInfo.td
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[AArch64][SVE] Asm: Add restricted register classes for SVE predicate vectors.
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2018-01-03 10:15:46 +00:00 |
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AArch64SchedA53.td
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[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
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2017-11-07 15:03:11 +00:00 |
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AArch64SchedA57.td
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[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
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2017-11-07 15:03:11 +00:00 |
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AArch64SchedA57WriteRes.td
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AArch64SchedCyclone.td
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[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
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2017-11-07 15:03:11 +00:00 |
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AArch64SchedFalkor.td
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[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
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2017-11-07 15:03:11 +00:00 |
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AArch64SchedFalkorDetails.td
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AArch64SchedKryo.td
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[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
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2017-11-07 15:03:11 +00:00 |
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AArch64SchedKryoDetails.td
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AArch64SchedM1.td
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[AArch64] Adjust the cost model for Exynos M1 and M2
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2017-11-22 22:48:50 +00:00 |
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AArch64SchedThunderX2T99.td
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[AArch64] Remove Unsupported = 1 flag for the WriteAtomic WriteRes.
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2018-01-11 16:50:56 +00:00 |
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AArch64SchedThunderX.td
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[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
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2017-11-07 15:03:11 +00:00 |
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AArch64Schedule.td
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AArch64SelectionDAGInfo.cpp
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AArch64/X86: Factor out common bzero logic; NFC
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2017-12-18 23:14:28 +00:00 |
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AArch64SelectionDAGInfo.h
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AArch64SIMDInstrOpt.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AArch64StorePairSuppress.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AArch64Subtarget.cpp
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AArch64: Fix emergency spillslot being out of reach for large callframes
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2018-01-19 03:16:36 +00:00 |
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AArch64Subtarget.h
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AArch64: Fix emergency spillslot being out of reach for large callframes
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2018-01-19 03:16:36 +00:00 |
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AArch64SVEInstrInfo.td
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[AArch64][SVE] Asm: Add support for RDVL/ADDVL/ADDPL instructions
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2018-01-19 15:22:00 +00:00 |
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AArch64SystemOperands.td
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[AArch64] CCSIDR2 system register
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2017-12-20 08:56:41 +00:00 |
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AArch64TargetMachine.cpp
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Add a TargetOption to enable/disable GlobalISel
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2018-01-17 22:34:21 +00:00 |
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AArch64TargetMachine.h
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(Re-landing) Expose a TargetMachine::getTargetTransformInfo function
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2017-12-22 18:21:59 +00:00 |
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AArch64TargetObjectFile.cpp
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AArch64TargetObjectFile.h
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Fix a bunch more layering of CodeGen headers that are in Target
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2017-11-17 01:07:10 +00:00 |
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AArch64TargetTransformInfo.cpp
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Fix -Wsign-compare warnings on Windows
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2018-01-05 19:53:51 +00:00 |
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AArch64TargetTransformInfo.h
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CMakeLists.txt
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[AArch64] Rename AArch64VecorByElementOpt.cpp into AArch64SIMDInstrOpt.cpp to reflect the recently added features.
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2017-12-08 22:04:13 +00:00 |
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LLVMBuild.txt
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SVEInstrFormats.td
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[AArch64][SVE] Asm: Add support for RDVL/ADDVL/ADDPL instructions
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2018-01-19 15:22:00 +00:00 |
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