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32d3b2625b
Fix a FIXME and allow predication (in Thumb2) for the T1 register to register MOV instructions. This allows some better codegen with if-conversion (as seen in the test updates), plus it lays the groundwork for pseudo-izing the tMOVCC instructions. llvm-svn: 134197
35 lines
1.2 KiB
LLVM
35 lines
1.2 KiB
LLVM
; RUN: llc -mtriple=thumbv7-apple-darwin10 < %s | FileCheck %s
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%struct.op = type { %struct.op*, %struct.op*, %struct.op* ()*, i32, i16, i16, i8, i8 }
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; CHECK: Perl_ck_sort
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; CHECK: ldreq
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; CHECK: moveq [[REGISTER:(r[0-9]+)|(lr)]]
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; CHECK: streq {{(r[0-9])|(lr)}}, {{\[}}[[REGISTER]]{{\]}}, #24
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define void @Perl_ck_sort() nounwind optsize {
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entry:
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%tmp27 = load %struct.op** undef, align 4
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switch i16 undef, label %if.end151 [
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i16 178, label %if.then60
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i16 177, label %if.then60
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]
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if.then60: ; preds = %if.then40
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br i1 undef, label %if.then67, label %if.end95
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if.then67: ; preds = %if.then60
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%op_next71 = getelementptr inbounds %struct.op* %tmp27, i32 0, i32 0
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store %struct.op* %tmp27, %struct.op** %op_next71, align 4
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%0 = getelementptr inbounds %struct.op* %tmp27, i32 1, i32 0
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br label %if.end95
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if.end95: ; preds = %if.else92, %if.then67
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%.pre-phi = phi %struct.op** [ undef, %if.then60 ], [ %0, %if.then67 ]
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%tmp98 = load %struct.op** %.pre-phi, align 4
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br label %if.end151
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if.end151: ; preds = %if.end100, %if.end, %entry
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ret void
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}
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