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llvm-mirror/test/CodeGen
Juneyoung Lee bab6d38daf [DAGCombiner] Fold SETCC(FREEZE(x),const) to FREEZE(SETCC(x,const)) if SETCC is used by BRCOND
This patch adds a peephole optimization `SETCC(FREEZE(x),const)` => `FREEZE(SETCC(x,const))`
if the SETCC is only used by BRCOND.

Combined with `BRCOND(FREEZE(X)) => BRCOND(X)`, this leads to a nice improvement in the generated assembly when x is a masked loaded value.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D105344
2021-07-28 09:22:15 +09:00
..
AArch64 Add test update for a11d9a1f480f which disables fallbacks. 2021-07-27 12:16:06 -07:00
AMDGPU AMDGPU/GlobalISel: Fix selecting G_SEXTLOAD/G_ZEXTLOAD pre-gfx9 2021-07-27 15:56:42 -04:00
ARC
ARM [Local] Do not introduce a new llvm.trap before unreachable 2021-07-26 23:33:36 -05:00
AVR
BPF
Generic [PowerPC] Add pwr7 and pwr10 support to IBM MASSV pass on AIX 2021-07-26 23:21:38 +00:00
Hexagon [Hexagon] Fix resetting dead registers in DBG_VALUE_LISTs 2021-07-27 18:36:28 -05:00
Inputs
Lanai
M68k
Mips
MIR
MSP430
NVPTX
PowerPC [PowerPC] Turn deprecated altivec prefetch instrs to nops on AIX 2021-07-27 15:50:02 -05:00
RISCV [RISCV] Select vector shl by 1 to a vector add. 2021-07-27 10:57:28 -07:00
SPARC
SystemZ [SystemZ][z/OS] Initial code to generate assembly files on z/OS 2021-07-27 11:29:15 -04:00
Thumb
Thumb2 [ARM] Implement isLoad/StoreFromStackSlot for MVE stack stores accesses 2021-07-27 09:11:58 +01:00
VE
WebAssembly [WebAssembly] Codegen for extmul SIMD instructions 2021-07-27 08:41:30 -07:00
WinCFGuard
WinEH
X86 [DAGCombiner] Fold SETCC(FREEZE(x),const) to FREEZE(SETCC(x,const)) if SETCC is used by BRCOND 2021-07-28 09:22:15 +09:00
XCore