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e25f0bd1c6
with its source instead of forcing the values on GPRs. This improves the lowering of vector code when such bitcasts happen in the middle of vector computations. rdar://problem/23691584 llvm-svn: 254684
73 lines
3.5 KiB
LLVM
73 lines
3.5 KiB
LLVM
; RUN: llc %s -o - | FileCheck %s
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target triple = "thumbv7s-apple-ios"
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declare <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8> %shuffle.i.i307, <8 x i8> %shuffle.i27.i308, <8 x i8> %vtbl2.i25.i)
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; Check that we get the motivating example:
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; The bitcasts force the values to go through the GPRs, whereas
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; they are defined on VPRs and used on VPRs.
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;
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; CHECK-LABEL: motivatingExample:
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; CHECK: vldr [[ARG2_VAL:d[0-9]+]], [r1]
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; CHECK-NEXT: vld1.32 {[[ARG1_VALlo:d[0-9]+]], [[ARG1_VALhi:d[0-9]+]]}, [r0]
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; CHECK-NEXT: vtbl.8 [[RES:d[0-9]+]], {[[ARG1_VALlo]], [[ARG1_VALhi]]}, [[ARG2_VAL]]
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; CHECK-NEXT: vstr [[RES]], [r1]
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; CHECK-NEXT: bx lr
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define void @motivatingExample(<2 x i64>* %addr, <8 x i8>* %addr2) {
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%shuffle.i.bc.i309 = load <2 x i64>, <2 x i64>* %addr
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%vtbl2.i25.i = load <8 x i8>, <8 x i8>* %addr2
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%shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 0
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%shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
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%tmp45 = bitcast i64 %shuffle.i.extract.i310 to <8 x i8>
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%tmp46 = bitcast i64 %shuffle.i27.extract.i311 to <8 x i8>
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%vtbl2.i25.i313 = tail call <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8> %tmp45, <8 x i8> %tmp46, <8 x i8> %vtbl2.i25.i)
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store <8 x i8> %vtbl2.i25.i313, <8 x i8>* %addr2
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ret void
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}
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; Check that we do not perform the transformation for dynamic index.
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; CHECK-LABEL: dynamicIndex:
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; CHECK-NOT: mul
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; CHECK: pop
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define void @dynamicIndex(<2 x i64>* %addr, <8 x i8>* %addr2, i32 %index) {
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%shuffle.i.bc.i309 = load <2 x i64>, <2 x i64>* %addr
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%vtbl2.i25.i = load <8 x i8>, <8 x i8>* %addr2
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%shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 %index
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%shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
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%tmp45 = bitcast i64 %shuffle.i.extract.i310 to <8 x i8>
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%tmp46 = bitcast i64 %shuffle.i27.extract.i311 to <8 x i8>
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%vtbl2.i25.i313 = tail call <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8> %tmp45, <8 x i8> %tmp46, <8 x i8> %vtbl2.i25.i)
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store <8 x i8> %vtbl2.i25.i313, <8 x i8>* %addr2
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ret void
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}
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; Check that we do not perform the transformation when there are several uses
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; of the result of the bitcast.
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; CHECK-LABEL: severalUses:
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; ARG1_VALlo is hard coded because we need to access the high part of d0,
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; i.e., s1, and we can't express that with filecheck.
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; CHECK: vld1.32 {[[ARG1_VALlo:d0]], [[ARG1_VALhi:d[0-9]+]]}, [r0]
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; CHECK-NEXT: vldr [[ARG2_VAL:d[0-9]+]], [r1]
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; s1 is actually 2 * ARG1_VALlo + 1, but we cannot express that with filecheck.
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; CHECK-NEXT: vmov [[REThi:r[0-9]+]], s1
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; We build the return value here. s0 is 2 * ARG1_VALlo.
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; CHECK-NEXT: vmov r0, s0
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; This copy is correct but actually useless. We should be able to clean it up.
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; CHECK-NEXT: vmov [[ARG1_VALloCPY:d[0-9]+]], r0, [[REThi]]
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; CHECK-NEXT: vtbl.8 [[RES:d[0-9]+]], {[[ARG1_VALloCPY]], [[ARG1_VALhi]]}, [[ARG2_VAL]]
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; CHECK-NEXT: vstr [[RES]], [r1]
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; CHECK-NEXT: mov r1, [[REThi]]
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; CHECK-NEXT: bx lr
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define i64 @severalUses(<2 x i64>* %addr, <8 x i8>* %addr2) {
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%shuffle.i.bc.i309 = load <2 x i64>, <2 x i64>* %addr
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%vtbl2.i25.i = load <8 x i8>, <8 x i8>* %addr2
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%shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 0
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%shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
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%tmp45 = bitcast i64 %shuffle.i.extract.i310 to <8 x i8>
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%tmp46 = bitcast i64 %shuffle.i27.extract.i311 to <8 x i8>
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%vtbl2.i25.i313 = tail call <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8> %tmp45, <8 x i8> %tmp46, <8 x i8> %vtbl2.i25.i)
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store <8 x i8> %vtbl2.i25.i313, <8 x i8>* %addr2
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ret i64 %shuffle.i.extract.i310
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}
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