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b9ecf8a3ee
This commit changes the interface of the vld[1234], vld[234]lane, and vst[1234], vst[234]lane ARM neon intrinsics and associates an address space with the pointer that these intrinsics take. This changes, e.g., <2 x i32> @llvm.arm.neon.vld1.v2i32(i8*, i32) to <2 x i32> @llvm.arm.neon.vld1.v2i32.p0i8(i8*, i32) This change ensures that address spaces are fully taken into account in the ARM target during lowering of interleaved loads and stores. Differential Revision: http://reviews.llvm.org/D12985 llvm-svn: 248887
27 lines
1.5 KiB
LLVM
27 lines
1.5 KiB
LLVM
; RUN: llc < %s -mtriple=thumbv7s-apple-ios3.0.0 -mcpu=generic | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
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; RUN: llc < %s -mtriple=thumbeb -target-abi apcs -mattr=v7,neon | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
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; PR15525
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; CHECK-LABEL: test1:
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; CHECK: ldr.w [[REG:r[0-9]+]], [sp]
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; CHECK-LE-NEXT: vmov {{d[0-9]+}}, r1, r2
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; CHECK-LE-NEXT: vmov {{d[0-9]+}}, r3, [[REG]]
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; CHECK-BE-NEXT: vmov {{d[0-9]+}}, r2, r1
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; CHECK-BE: vmov {{d[0-9]+}}, [[REG]], r3
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; CHECK: vst1.8 {{{d[0-9]+}}, {{d[0-9]+}}}, [r0]
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; CHECK-NEXT: bx lr
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define void @test1(i8* %arg, [4 x i64] %vec.coerce) {
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bb:
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%tmp = extractvalue [4 x i64] %vec.coerce, 0
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%tmp2 = bitcast i64 %tmp to <8 x i8>
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%tmp3 = shufflevector <8 x i8> %tmp2, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%tmp4 = extractvalue [4 x i64] %vec.coerce, 1
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%tmp5 = bitcast i64 %tmp4 to <8 x i8>
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%tmp6 = shufflevector <8 x i8> %tmp5, <8 x i8> undef, <16 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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%tmp7 = shufflevector <16 x i8> %tmp6, <16 x i8> %tmp3, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
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tail call void @llvm.arm.neon.vst1.p0i8.v16i8(i8* %arg, <16 x i8> %tmp7, i32 2)
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ret void
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}
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declare void @llvm.arm.neon.vst1.p0i8.v16i8(i8*, <16 x i8>, i32)
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